Datasheet InnoSwitch3-CP (Power Integrations) - 10

InnoSwitch3-CP
Below the CC threshold, the device operates in constant voltage PRIMARY BYPASS pin. The rectified and filtered bias winding output mode. Output voltage is regulated so as to achieve a voltage of voltage may be higher than expected (up to 1.5X or 2X the desired 1.265 V on the FEEDBACK pin. Capacitor C11 provides noise filtering value) due to poor coupling of the bias winding with the output of the signal at the FEEDBACK pin. winding and the resulting ringing on the bias winding voltage waveform. In this design, a Cypress CYPD2134 (U2) IC is the USB Type-C and PD It is therefore recommended that the rectified bias winding voltage control er used. The output of the power conversion stage powers be measured. This measurement should be ideal y done at the the Cypress device through its VCC pin. lowest input voltage and with highest load on the output. This measured voltage should be used to select the components required Resistors R23 and R24 of the PD control er stage sense the output of to achieve primary sensed OVP. It is recommended that a Zener power stage to provide voltage feedback to the PD control er. Output diode with a clamping voltage approximately 6 V lower than the bias voltage is changed to 15 V, 9 V or 5 V when sink requests for the winding rectified voltage at which OVP is expected to be triggered be same. To change the output to 15 V, GPI07 of IC U2 goes low and selected. A forward voltage drop of 1 V can be assumed for the adds resistor R19 in paral el to the bottom resistor of the feedback blocking diode. A small signal standard recovery diode is divider network. recommended. The blocking diode prevents any reverse current USB PD protocol is communicated over either the CC1 or CC2 line discharging the bias capacitor during start-up. Final y, the value of depending on the orientation of the Type-C plug. P-channel switch the series resistor required can be calculated such that a current Q1 and Q2 form the bus-switch and al ow the USB Type-C receptacle higher than I will flow into the PRIMARY BYPASS pin during an SD to go “cold-socket” when no device is attached to the charger as per output overvoltage. the USB Type-C specification.
Reducing No-load Consumption
The InnoSwitch3-CP IC can start in self-powered mode, drawing
Key Application Considerations
energy from the BYPASS pin capacitor charged through an internal current source. Use of a bias winding is however required to provide
Output Power Table
(I ) supply current to the PRIMARY BYPASS pin once the The data sheet output power table (Table 1) represents the maximum S1 InnoSwitch3-CP IC has started switching. An auxiliary (bias) winding practical continuous output power level that can be obtained under provided on the transformer serves this purpose. A bias winding the fol owing conditions: driver supply to the PRIMARY BYPASS pin enables design of power 1. The minimum DC input voltage is 90 V or higher for 85 VAC input, supplies with no-load power consumption less than 15 mW. Resistor 220 V or higher for 230 VAC input or 115 VAC with a voltage- R20 shown in Figure 11 should be adjusted to achieve the lowest doubler. Input capacitor voltage should be sized to meet these no-load input power. criteria for AC input designs.
Secondary-Side Overvoltage Protection (Auto-Restart Mode)
2. Efficiency assumptions depend on power level. Smallest device The secondary-side output overvoltage protection provided by the power level assumes efficiency >84% increasing to >89% for the InnoSwitch3-CP IC uses an internal auto restart circuit that is largest device. triggered by an input current exceeding a threshold of I into the BPS(SD) 3. Transformer primary inductance tolerance of ±10%. SECONDARY BYPASS pin. The direct output sensed OVP function can 4. Reflected output voltage (VOR) is set to maintain K = 0.8 at be realized by connecting a Zener diode from the output to the P minimum input voltage for universal line and K = 1 for high input SECONDARY BYPASS pin. The Zener diode voltage needs to be the P line designs. difference between 1.25 × V and 4.4 V − the SECONDARY BYPASS OUT 5. Maximum conduction losses for adapters is limited to 0.6 W, 0.8 W pin voltage. It is necessary to add a low value resistor in series with for open frame designs. the OVP Zener diode to limit the maximum current into the 6. Increased current limit is selected for peak and open frame power SECONDARY BYPASS pin. columns and standard current limit for adapter columns. 7. The part is board mounted with SOURCE pins soldered to a
Selection of Components
sufficient area of copper and/or a heat sink to keep the SOURCE pin temperature at or below 110 °C.
Components for InnoSwitch3-CP
8. Ambient temperature of 50 °C for open frame designs and 40 °C
Primary-Side Circuit
for sealed adapters. 9. Below a value of 1, K is the ratio of ripple to peak primary
BPP Capacitor
P current. To prevent reduced power delivery, due to premature A capacitor connected from the PRIMARY BYPASS pin of the termination of switching cycles, a transient K limit of ≥0.25 is InnoSwitch3-CP IC to GND provides decoupling for the primary-side P recommended. This prevents the initial current limit (I ) from control er and also selects current limit. A 0.47 mF or 4.7 mF capacitor INT being exceeded at Switch turn-on. may be used. Though electrolytic capacitors can be used, often surface mount multi-layer ceramic capacitors are preferred for use on
Primary-Side Overvoltage Protection (Latch-Off Mode)
double sided boards as they enable placement of capacitors close to Primary-side output overvoltage protection provided by the the IC. Their smal size also makes it ideal for compact power supplies. InnoSwitch3-CP IC uses an internal latch that is triggered by a 16 V or 25 V rated X5R or X7R dielectric capacitors are recommended threshold current of I into the PRIMARY BYPASS pin. In addition to SD to ensure that minimum capacitance requirements are met. an internal filter, the PRIMARY BYPASS pin capacitor forms an external filter helping noise immunity. For the bypass capacitor to be
Bias Winding and External Bias Circuit
effective as a high frequency filter, the capacitor should be located as The internal regulator connected from the DRAIN pin of the Switch to close as possible to the SOURCE and PRIMARY BYPASS pins of the the PRIMARY BYPASS pin of the InnoSwitch3-CP primary-side device. control er charges the capacitor connected to the PRIMARY BYPASS pin to achieve start-up. A bias winding should be provided on the The primary sensed OVP function can be realized by connecting a transformer with a suitable rectifier and filter capacitor to create a series combination of a Zener diode, a resistor and a blocking diode bias supply that can be used to supply at least 1 mA of current to the from the rectified and filtered bias winding voltage supply to the PRIMARY BYPASS pin.
10
Rev. E 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-CP Functional Description Primary Controller Secondary Controller Applications Example Key Application Considerations Selection of Components Recommendations for Circuit Board Layout Layout Example Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Typical Performance Curves InSOP-24D Package Drawing InSOP-24D Package Marking Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information