Datasheet InnoSwitch3-CP (Power Integrations) - 4

InnoSwitch3-CP Primary Controller
1.05 InnoSwitch3-CP has variable frequency QR control er plus CCM/CrM/ DCM operation for enhanced efficiency and extended output power
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1.0 capability. -8205-120516
(A
PI
PRIMARY BYPASS Pin Regulator
0.95
LIM
The PRIMARY BYPASS pin has an internal regulator that charges the PRIMARY BYPASS pin capacitor to V by drawing current from the 0.9 BPP DRAIN pin whenever the power switch is off. The PRIMARY BYPASS pin is the internal supply voltage node. When the power switch is on, 0.85 the device operates from the energy stored in the PRIMARY BYPASS
ormalized I
pin capacitor.
N
0.8 In addition, a shunt regulator clamps the PRIMARY BYPASS pin voltage to V when current is provided to the PRIMARY BYPASS SHUNT pin through an external resistor. This al ows the InnoSwitch3-CP to 0.75 be powered external y through a bias winding, decreasing the no-load 30 40 50 60 70 80 90 100 consumption to less than 15 mW in a 5 V output design.
Steady-State Switching Frequency (kHz) Primary Bypass ILIM Programming
Figure 7. Normalized Primary Current vs. Frequency. InnoSwitch3-CP ICs al ows the user to adjust current limit (ILIM) settings through the selection of the PRIMARY BYPASS pin capacitor value. A ceramic capacitor can be used.
Current Limit Operation
The primary-side control er has a current limit threshold ramp that is There are 2 selectable capacitor sizes - 0.47 mF and 4.7 mF for setting linearly decreasing to the time from the end of the previous primary standard and increased ILIM settings respectively. switching cycle (i.e. from the time the primary Switch turns off at the
Primary Bypass Undervoltage Threshold
end of a switching cycle). The PRIMARY BYPASS pin undervoltage circuitry disables the power This characteristic produces a primary current limit that increases as switch when the PRIMARY BYPASS pin voltage drops below ~4.5 V the switching frequency (load) increases (Figure 7). (V - V ) in steady-state operation. Once the PRIMARY BYPASS BPP BP(H) pin voltage fal s below this threshold, it must rise to V to This algorithm enables the most efficient use of the primary switch SHUNT re-enable turn-on of the power switch. with the benefit that this algorithm responds to digital feedback information immediately when a feedback switching cycle request is
Primary Bypass Output Overvoltage Function
received. The PRIMARY BYPASS pin has a latching OV protection feature. A Zener diode in paral el with the resistor in series with the PRIMARY At high load, switching cycles have a maximum current approaching BYPASS pin capacitor is typical y used to detect an overvoltage on the 100% I . This gradual y reduces to 30% of the full current limit as LIM primary bias winding and activate the protection mechanism. In the load decreases. Once 30% current limit is reached, there is no event that the current into the PRIMARY BYPASS pin exceeds ISD, the further reduction in current limit (since this is low enough to avoid device will latch-off or disable the power switch switching for a time audible noise). The time between switching cycles will continue to t , after which time the control er will restart and attempt to increase as load reduces. AR(OFF) return to regulation (see Secondary Fault Response in the Feature
Jitter
Code Addenda). The normalized current limit is modulated between 100% and 95% VOUT OV protection is also included as an integrated feature on the at a modulation frequency of f . This results in a frequency jitter of M secondary control er (see Output Voltage Protection). ~7 kHz with average frequency of ~100 kHz.
Over-Temperature Protection Auto-Restart
The thermal shutdown circuitry senses the primary Switch die In the event a fault condition occurs (such as an output overload, temperature. The threshold is set to T with either a hysteretic or output short-circuit, or external component/pin fault), the SD latch-off response. InnoSwitch3-CP enters auto-restart (AR) or latches off. The latching condition is reset by bringing the PRIMARY BYPASS pin below ~3 V or Hysteretic response: If the die temperature rises above the threshold, by going below the UNDER/OVER INPUT VOLTAGE pin UV (I ) the power switch is disabled and remains disabled until the die UV- threshold. temperature fal s by T at which point switching is re-enabled. A SD(H) large amount of hysteresis is provided to prevent over-heating of the In auto-restart, switching of the power switch is disabled for t . AR(OFF) PCB due to a continuous fault condition. There are 2 ways to enter auto-restart: Latch-off response: If the die temperature rises above the threshold 1. Continuous secondary requests at above the overload detection the power switch is disabled. The latching condition is reset by frequency f (~110 kHz) for longer than 82 ms (t ). OVL AR bringing the PRIMARY BYPASS pin below V or by going below 2. No requests for switching cycles from the secondary for >t . BPP(RESET) AR(SK) the UNDER/OVER INPUT VOLTAGE pin UV (I ) threshold. UV- The second is included to ensure that if communication is lost, the primary tries to restart. Although this should never be the case in normal operation, it can be useful when system ESD events (for example) causes a loss of communication due to noise disturbing the secondary control er. The issue is resolved when the primary restarts after an auto-restart off-time.
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Rev. E 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-CP Functional Description Primary Controller Secondary Controller Applications Example Key Application Considerations Selection of Components Recommendations for Circuit Board Layout Layout Example Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Typical Performance Curves InSOP-24D Package Drawing InSOP-24D Package Marking Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information