Datasheet AD8432 (Analog Devices) - 8

AD8432 Data Sheet 30 240 24 230 18 220 ) Ω 12 ( E ) 210 B d 6 ( DANC IN E 200 0 P GA M I 190 –6 UT INP 180 –12 G = 24.08dB G = 24.08dB –18 G = 21.58dB 170 G = 21.58dB G = 18.06dB G = 18.06dB G = 12.04dB G = 12.04dB –24 160 1 10 100 1k
1 01
0.1 1 10
31 0 1- 1-
FREQUENCY (MHz)
34
FREQUENCY (MHz)
34 08 08 Figure 9. Differential Gain vs. Frequency, VOUT = 2 V p-p, RIN = 50 Ω Figure 12. Input Impedance RIN vs. Frequency, 200 Ω Active Termination
55 10 54 53 ) ) 52 (Ω E (kΩ C 51 N A ANCE 50 D 1 PED E M P I 49 M T I PU UT 48 IN INP 47 G = 24.08dB G = 24.08dB 46 G = 21.58dB G = 21.58dB G = 18.06dB G = 18.06dB G = 12.04dB G = 12.04dB 45 0.1 0.1 1 10
9
0.1 1 10
32 -02 -0
FREQUENCY (MHz)
341 41
FREQUENCY (MHz)
08 83 0 Figure 10. Input Impedance RIN vs. Frequency, 50 Ω Active Termination Figure 13. Input Impedance RIN vs. Frequency, Unterminated
115 3.5 110 3.0 ) ) Ω Ω 2.5 ( ( 105 2.0 DANCE DANCE E 100 E P P M M I I 1.5 UT UT 95 P INP UT 1.0 O 90 G = 24.08dB G = 21.58dB 0.5 G = 18.06dB G = 12.04dB 85 0 0.1 1 10
30
0.1 1 10 100
33 0 0 1- 1-
FREQUENCY (MHz)
34
FREQUENCY (MHz)
34 08 08 Figure 11. Input Impedance RIN vs. Frequency, 100 Ω Active Termination Figure 14. Output Impedance vs. Frequency Rev. D | Page 8 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION LOW NOISE AMPLIFIER (LNA) GAIN SETTING TECHNIQUE ACTIVE INPUT RESISTANCE MATCHING APPLICATIONS INFORMATION TYPICAL SETUP I/Q DEMODULATION FRONT END DIFFERENTIAL-TO-SINGLE-ENDED CONVERSION EVALUATION BOARD CONNECTION AND OPERATION Power Supply Input Termination Setting the Amplifier Gain Output SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES