Datasheet AD8432 (Analog Devices) - 2
| Hersteller | Analog Devices |
| Beschreibung | Dual-Channel Ultralow Noise Amplifier with Selectable Gain and Input Impedance |
| Seiten / Seite | 32 / 2 — AD8432. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 3/2017—Rev. C to … |
| Revision | D |
| Dateiformat / Größe | PDF / 892 Kb |
| Dokumentensprache | Englisch |
AD8432. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 3/2017—Rev. C to Rev. D. 3/2011—Rev. A to Rev. B. 2/2010—Rev. 0 to Rev. A
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AD8432 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 18 Applications ... 1 Low Noise Amplifier (LNA) ... 18 Functional Block Diagram .. 1 Gain Setting Technique ... 18 General Description ... 1 Active Input Resistance Matching .. 19 Revision History ... 2 Applications Information .. 21 Specifications ... 3 Typical Setup ... 21 Absolute Maximum Ratings .. 5 I/Q Demodulation Front End ... 23 Thermal Resistance .. 5 Differential-to-Single-Ended Conversion ... 24 Maximum Power Dissipation ... 5 Evaluation Board .. 25 ESD Caution .. 5 Connection and Operation ... 25 Pin Configuration and Function Descriptions ... 6 Schematic... 28 Typical Performance Characteristics ... 7 Outline Dimensions ... 29 Test Circuits ... 16 Ordering Guide .. 29
REVISION HISTORY 3/2017—Rev. C to Rev. D 3/2011—Rev. A to Rev. B
Changed CP-24-7 to CP-24-15 .. Throughout Changes to Format ... 21 Changes to Outline Dimensions ... 29 Changes to Ordering Guide .. 29
2/2010—Rev. 0 to Rev. A
Changes to General Description ... 1
7/2012—Rev. B to Rev. C
Changes to Figure 5, Figure 6, Figure 7, Figure 8 .. 7 Changes to Figure 1 .. 1 Added Figure 27, Figure 29, and Figure 31, Renumbered Changes to Figure 65 .. 18 Sequentially ... 11 Change to Figure 69 ... 21 Added Figure 33 and Figure 35 .. 12 Changes to Table 7 .. 22 Changes to Figure 58 .. 16 Deleted Gain Settings Section and Table 8 .. 25 Changes to Evaluation Board Section and Figure 73; Added
10/2009—Revision 0: Initial Version
Connection and Operation Section and Table 8 .. 25 Added Figure 74 to Figure 78, Renumbered Sequentially .. 26 Added Figure 79 .. 27 Changes to Figure 80 .. 28 Updated Outline Dimensions ... 29 Rev. D | Page 2 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION LOW NOISE AMPLIFIER (LNA) GAIN SETTING TECHNIQUE ACTIVE INPUT RESISTANCE MATCHING APPLICATIONS INFORMATION TYPICAL SETUP I/Q DEMODULATION FRONT END DIFFERENTIAL-TO-SINGLE-ENDED CONVERSION EVALUATION BOARD CONNECTION AND OPERATION Power Supply Input Termination Setting the Amplifier Gain Output SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES
AD8432 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 18 Applications ... 1 Low Noise Amplifier (LNA) ... 18 Functional Block Diagram .. 1 Gain Setting Technique ... 18 General Description ... 1 Active Input Resistance Matching .. 19 Revision History ... 2 Applications Information .. 21 Specifications ... 3 Typical Setup ... 21 Absolute Maximum Ratings .. 5 I/Q Demodulation Front End ... 23 Thermal Resistance .. 5 Differential-to-Single-Ended Conversion ... 24 Maximum Power Dissipation ... 5 Evaluation Board .. 25 ESD Caution .. 5 Connection and Operation ... 25 Pin Configuration and Function Descriptions ... 6 Schematic... 28 Typical Performance Characteristics ... 7 Outline Dimensions ... 29 Test Circuits ... 16 Ordering Guide .. 29
REVISION HISTORY 3/2017—Rev. C to Rev. D 3/2011—Rev. A to Rev. B
Changed CP-24-7 to CP-24-15 .. Throughout Changes to Format ... 21 Changes to Outline Dimensions ... 29 Changes to Ordering Guide .. 29
2/2010—Rev. 0 to Rev. A
Changes to General Description ... 1
7/2012—Rev. B to Rev. C
Changes to Figure 5, Figure 6, Figure 7, Figure 8 .. 7 Changes to Figure 1 .. 1 Added Figure 27, Figure 29, and Figure 31, Renumbered Changes to Figure 65 .. 18 Sequentially ... 11 Change to Figure 69 ... 21 Added Figure 33 and Figure 35 .. 12 Changes to Table 7 .. 22 Changes to Figure 58 .. 16 Deleted Gain Settings Section and Table 8 .. 25 Changes to Evaluation Board Section and Figure 73; Added
10/2009—Revision 0: Initial Version
Connection and Operation Section and Table 8 .. 25 Added Figure 74 to Figure 78, Renumbered Sequentially .. 26 Added Figure 79 .. 27 Changes to Figure 80 .. 28 Updated Outline Dimensions ... 29 Rev. D | Page 2 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION LOW NOISE AMPLIFIER (LNA) GAIN SETTING TECHNIQUE ACTIVE INPUT RESISTANCE MATCHING APPLICATIONS INFORMATION TYPICAL SETUP I/Q DEMODULATION FRONT END DIFFERENTIAL-TO-SINGLE-ENDED CONVERSION EVALUATION BOARD CONNECTION AND OPERATION Power Supply Input Termination Setting the Amplifier Gain Output SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES