Datasheet AD8331, AD8332, AD8334 (Analog Devices) - 9

Data Sheet AD8331/AD8332/AD8334 1 1 M M1 LMD2 1 P1 28 LMD1 IN1 ILO NBL NBV PIN 1 LOP CO VI V VC H E E INH2 2 INDICATOR 27 INH1 32 31 30 29 28 27 26 25 VPS2 3 26 VPS1 LON1 1 24 COMM LON2 4 25 LON1 VPS1 2 23 VOH1 LOP2 5 24 LOP1 INH1 3 22 VOL1 AD8332 AD8332 LMD1 COM2 4 21 VPSV 6 23 COM1 TOP VIEW LMD2 5 TOP VIEW 20 NC VIP2 7 (Not to Scale) (Not to Scale) 22 VIP1 INH2 6 19 VOL2 VIN2 8 21 VIN1 VPS2 7 18 VOH2 LON2 8 17 COMM VCM2 9 20 VCM1 GAIN 10 19 HILO 9 10 11 12 13 14 15 16 2 2 RCLMP 11 18 ENB P M P2 IN IN2 M2 DE M VI V O VOH2 12 GA 17 VOH1 LOP CO VC M RCL VOL2 13 NOTES 16 VOL1 1. NC = NO CONNECT.
004
COMM 14 15 VPSV 2. THE EXPOSED PAD MUST BE SOLDERED TO THE PCB
005
GROUND TO ENSURE PROPER HEAT DISSIPATION,
03199-
NOISE, AND MECHANICAL STRENGTH BENEFITS.
03199- Figure 4. 28-Lead TSSOP Pin Configuration (AD8332) Figure 5. 32-Lead LFCSP Pin Configuration (AD8332)
Table 4. 28-Lead TSSOP Pin Function Description (AD8332) Table 5. 32-Lead LFCSP Pin Function Description (AD8332) Pin No. Mnemonic Description Pin No. Mnemonic Description
1 LMD2 CH 2 LNA Midsupply Pin; Connect a Capacitor 1 LON1 CH1 LNA Inverting Output for Midsupply HF Bypass 2 VPS1 CH1 LNA Supply 5 V 2 INH2 CH2 LNA Input 3 INH1 CH1 LNA Input 3 VPS2 CH2 Supply LNA 5 V 4 LMD1 CH 1 LNA Midsupply Pin; Connect a Capacitor 4 LON2 CH2 LNA Inverting Output for Midsupply HF Bypass 5 LOP2 CH2 LNA Noninverting Output 5 LMD2 CH 2 LNA Midsupply Pin; Connect a Capacitor 6 COM2 CH2 LNA Ground for Midsupply HF Bypass 7 VIP2 CH2 VGA Noninverting Input 6 INH2 CH2 LNA Input 8 VIN2 CH2 VGA Inverting Input 7 VPS2 CH2 LNA Supply 5 V 9 VCM2 CH2 Common-Mode Voltage 8 LON2 CH2 LNA Inverting Output 10 GAIN Gain Control Voltage 9 LOP2 CH2 LNA Noninverting Output 11 RCLMP Output Clamping Resistor 10 COM2 CH2 LNA Ground 12 VOH2 CH2 Noninverting VGA Output 11 VIP2 CH2 VGA Noninverting Input 13 VOL2 CH2 Inverting VGA Output 12 VIN2 CH2 VGA Inverting Input 14 COMM VGA Ground (Both Channels) 13 VCM2 CH2 Common-Mode Voltage 15 VPSV VGA Supply 5 V (Both Channels) 14 MODE Gain Slope Logic Input 16 VOL1 CH1 Inverting VGA Output 15 GAIN Gain Control Voltage 17 VOH1 CH1 Noninverting VGA Output 16 RCLMP Output Clamping Level Input 18 ENB Enable—VGA/LNA 17 COMM VGA Ground 19 HILO VGA Gain Range Select (HI or LO) 18 VOH2 CH2 Noninverting VGA Output 20 VCM1 CH1 Common-Mode Voltage 19 VOL2 CH2 Inverting VGA Output 21 VIN1 CH1 VGA Inverting Input 20 NC No Connect 22 VIP1 CH1 VGA Noninverting Input 21 VPSV VGA Supply 5 V 23 COM1 CH1 LNA Ground 22 VOL1 CH1 Inverting VGA Output 24 LOP1 CH1 LNA Noninverting Output 23 VOH1 CH1 Noninverting VGA Output 25 LON1 CH1 LNA Inverting Output 24 COMM VGA Ground 26 VPS1 CH1 LNA Supply 5 V 25 ENBV VGA Enable 27 INH1 CH1 LNA Input 26 ENBL LNA Enable 28 LMD1 CH 1 LNA Midsupply Pin; Connect a Capacitor 27 HILO VGA Gain Range Select (HI or LO) for Midsupply HF Bypass 28 VCM1 CH1 Common-Mode Voltage 29 VIN1 CH1 VGA Inverting Input 30 VIP1 CH1 VGA Noninverting Input 31 COM1 CH1 LNA Ground 32 LOP1 CH1 LNA Noninverting Output EPAD Exposed Pad. The exposed pad must be soldered to the PCB ground to ensure proper heat dissipation, noise, and mechanical strength benefits. Rev. I | Page 9 of 55 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS MEASUREMENT CONSIDERATIONS THEORY OF OPERATION OVERVIEW LOW NOISE AMPLIFIER (LNA) Active Impedance Matching LNA Noise VARIABLE GAIN AMPLIFIER X-AMP VGA Gain Control VGA Noise Common-Mode Biasing POSTAMPLIFIER Noise Output Clamping APPLICATIONS INFORMATION LNA—EXTERNAL COMPONENTS Gain Input VCM Input Logic Inputs—ENB, MODE, and HILO Optional Output Voltage Limiting Output Decoupling DRIVING ADCs OVERLOAD OPTIONAL INPUT OVERLOAD PROTECTION LAYOUT, GROUNDING, AND BYPASSING MULTIPLE INPUT MATCHING DISABLING THE LNA ULTRASOUND TGC APPLICATION HIGH DENSITY QUAD LAYOUT AD8331 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT AD8331 EVALUATION BOARD SCHEMATICS AD8331 EVALUATION BOARD PCB LAYERS AD8332 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8332 EVALUATION BOARD PCB LAYERS AD8334 EVALUATION BOARD GENERAL DESCRIPTION CONFIGURING THE INPUT IMPEDANCE Driving the VGA from an External Source or Using the LNA to Drive an External Load Using the Clamp Circuit Viewing Signals MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8334 EVALUATION BOARD PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE