Datasheet AD8331, AD8332, AD8334 (Analog Devices) - 10

AD8331/AD8332/AD8334 Data Sheet 12 2 1 1 1 P M M D1 N12 M M1 M2 M P1 IN1 AI N12 N34 CO CO INH1 L NC LON LOP VI V VPS1 G CL E E VC VC 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 INH2 1 PIN 1 48 COM12 INDICATOR LMD2 2 47 VOH1 NC 3 46 VOL1 LON2 4 45 VPS12 LOP2 5 44 VOL2 VIP2 6 43 VOH2 VIN2 7 42 COM12 AD8334 VPS2 8 41 MODE TOP VIEW VPS3 9 40 NC (Not to Scale) VIN3 10 39 COM34 VIP3 11 38 VOH3 LOP3 12 37 VOL3 LON3 13 36 VPS34 NC 14 35 VOL4 LMD3 15 34 VOH4 INH3 16 33 COM34 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 3 4 4 4 M M D4 NC P4 IN4 34 P ILO M4 M3 NC INH4 M VI V N34 H CO CO L LON LOP VPS4 AI M VC VC G CL NOTES 1. THE EXPOSED PADDLE MUST BE SOLDERED TO THE PCB GROUND TO ENSURE PROPER HEAT DISSIPATION, NOISE, AND
006
MECHANICAL STRENGTH BENEFITS. 2. NC = NO CONNECT.
03199- Figure 6. 64-Lead LFCSP Pin Configuration (AD8334)
Table 6. 64-Lead LFCSP Pin Function Description (AD8334) Pin No. Mnemonic Description
1 INH2 CH2 LNA Input. 2 LMD2 CH 2 LNA Midsupply Pin; Connect a Capacitor for Midsupply HF Bypass. 3 NC Not Connected. 4 LON2 CH2 LNA Feedback Output (for RIZ). 5 LOP2 CH2 LNA Output. 6 VIP2 CH2 VGA Positive Input. 7 VIN2 CH2 VGA Negative Input. 8 VPS2 CH2 LNA Supply 5 V. 9 VPS3 CH3 LNA Supply 5 V. 10 VIN3 CH3 VGA Negative Input. 11 VIP3 CH3 VGA Positive Input. 12 LOP3 CH3 LNA Positive Output. 13 LON3 CH3 LNA Feedback Output (for RIZ). 14 NC Not Connected. 15 LMD3 CH 3 LNA Midsupply Pin; Connect a Capacitor for Midsupply HF Bypass. 16 INH3 CH3 LNA Input. 17 COM3 CH3 LNA Ground. 18 COM4 CH4 LNA Ground. 19 INH4 CH4 LNA Input. 20 LMD4 CH 4 LNA Midsupply Pin; Connect a Capacitor for Midsupply HF Bypass. 21 NC Not Connected. 22 LON4 CH4 LNA Feedback Output (for RIZ). 23 LOP4 CH4 LNA Positive Output. 24 VIP4 CH4 VGA Positive Input. 25 VIN4 CH4 VGA Negative Input. 26 VPS4 CH4 LNA Supply 5 V. Rev. I | Page 10 of 55 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS MEASUREMENT CONSIDERATIONS THEORY OF OPERATION OVERVIEW LOW NOISE AMPLIFIER (LNA) Active Impedance Matching LNA Noise VARIABLE GAIN AMPLIFIER X-AMP VGA Gain Control VGA Noise Common-Mode Biasing POSTAMPLIFIER Noise Output Clamping APPLICATIONS INFORMATION LNA—EXTERNAL COMPONENTS Gain Input VCM Input Logic Inputs—ENB, MODE, and HILO Optional Output Voltage Limiting Output Decoupling DRIVING ADCs OVERLOAD OPTIONAL INPUT OVERLOAD PROTECTION LAYOUT, GROUNDING, AND BYPASSING MULTIPLE INPUT MATCHING DISABLING THE LNA ULTRASOUND TGC APPLICATION HIGH DENSITY QUAD LAYOUT AD8331 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT AD8331 EVALUATION BOARD SCHEMATICS AD8331 EVALUATION BOARD PCB LAYERS AD8332 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8332 EVALUATION BOARD PCB LAYERS AD8334 EVALUATION BOARD GENERAL DESCRIPTION CONFIGURING THE INPUT IMPEDANCE Driving the VGA from an External Source or Using the LNA to Drive an External Load Using the Clamp Circuit Viewing Signals MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8334 EVALUATION BOARD PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE