Datasheet AD8331, AD8332, AD8334 (Analog Devices) - 4

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AD8331/AD8332/AD8334 Data Sheet SPECIFICATIONS
TA = 25°C, VS = 5 V, RL = 500 Ω, RS = RIN = 50 Ω, RIZ = 280 Ω, CSH = 22 pF, f = 10 MHz, RCLMP = ∞, CL = 1 pF, VCM pin floating, −4.5 dB to +43.5 dB gain (HILO = LO), and differential output voltage, unless otherwise specified.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit1
LNA CHARACTERISTICS Gain Single-ended input to differential output 19 dB Input to output (single-ended) 13 dB Input Voltage Range AC-coupled ±275 mV Input Resistance RIZ = 280 Ω 50 Ω RIZ = 412 Ω 75 Ω RIZ = 562 Ω 100 Ω RIZ = 1.13 kΩ 200 Ω RIZ = ∞ 6 kΩ Input Capacitance 13 pF Output Impedance Single-ended, either output 5 Ω −3 dB Small Signal Bandwidth VOUT = 0.2 V p-p 130 MHz Slew Rate 650 V/µs Input Voltage Noise RS = 0 Ω, HI or LO gain, RIZ = ∞, f = 5 MHz 0.74 nV/√Hz Input Current Noise RIZ = ∞, HI or LO gain, f = 5 MHz 2.5 pA/√Hz Noise Figure f = 10 MHz, LOP output Active Termination Match RS = RIN = 50 Ω 3.7 dB Unterminated RS = 50 Ω, RIZ = ∞ 2.5 dB Harmonic Distortion at LOP1 or LOP2 VOUT = 0.5 V p-p, single-ended, f = 10 MHz HD2 −56 dBc HD3 −70 dBc Output Short-Circuit Current Pin LON, Pin LOP 165 mA LNA AND VGA CHARACTERISTICS −3 dB Small Signal Bandwidth VOUT = 0.2 V p-p AD8331 120 MHz AD8332, AD8334 100 MHz −3 dB Large Signal Bandwidth VOUT = 2 V p-p AD8331 110 MHz AD8332, AD8334 90 MHz Slew Rate AD8331 LO gain 300 V/µs HI gain 1200 V/µs AD8332, AD8334 LO gain 275 V/µs HI gain 1100 V/µs Input Voltage Noise RS = 0 Ω, HI or LO gain, RIZ = ∞, f = 5 MHz 0.82 nV/√Hz Noise Figure VGAIN = 1.0 V Active Termination Match RS = RIN = 50 Ω, f = 10 MHz, measured 4.15 dB RS = RIN = 200 Ω, f = 5 MHz, simulated 2.0 dB Unterminated RS = 50 Ω, RIZ = ∞, f = 10 MHz, measured 2.5 dB RS = 200 Ω, RIZ = ∞, f = 5 MHz, simulated 1.0 dB Output-Referred Noise AD8331 VGAIN = 0.5 V, LO gain 48 nV/√Hz VGAIN = 0.5 V, HI gain 178 nV/√Hz AD8332, AD8334 VGAIN = 0.5 V, LO gain 40 nV/√Hz VGAIN = 0.5 V, HI gain 150 nV/√Hz Output Impedance, Postamplifier DC to 1 MHz 1 Ω Output Signal Range, Postamplifier RL ≥ 500 Ω, unclamped, either pin VCM ± 1.125 V Rev. I | Page 4 of 55 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS MEASUREMENT CONSIDERATIONS THEORY OF OPERATION OVERVIEW LOW NOISE AMPLIFIER (LNA) Active Impedance Matching LNA Noise VARIABLE GAIN AMPLIFIER X-AMP VGA Gain Control VGA Noise Common-Mode Biasing POSTAMPLIFIER Noise Output Clamping APPLICATIONS INFORMATION LNA—EXTERNAL COMPONENTS Gain Input VCM Input Logic Inputs—ENB, MODE, and HILO Optional Output Voltage Limiting Output Decoupling DRIVING ADCs OVERLOAD OPTIONAL INPUT OVERLOAD PROTECTION LAYOUT, GROUNDING, AND BYPASSING MULTIPLE INPUT MATCHING DISABLING THE LNA ULTRASOUND TGC APPLICATION HIGH DENSITY QUAD LAYOUT AD8331 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT AD8331 EVALUATION BOARD SCHEMATICS AD8331 EVALUATION BOARD PCB LAYERS AD8332 EVALUATION BOARD GENERAL DESCRIPTION USER-SUPPLIED OPTIONAL COMPONENTS MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8332 EVALUATION BOARD PCB LAYERS AD8334 EVALUATION BOARD GENERAL DESCRIPTION CONFIGURING THE INPUT IMPEDANCE Driving the VGA from an External Source or Using the LNA to Drive an External Load Using the Clamp Circuit Viewing Signals MEASUREMENT SETUP BOARD LAYOUT EVALUATION BOARD SCHEMATICS AD8334 EVALUATION BOARD PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE