Datasheet AD9273 (Analog Devices) - 2

HerstellerAnalog Devices
BeschreibungOctal LNA/VGA/AAF/ADC and Crosspoint Switch
Seiten / Seite48 / 2 — AD9273. TABLE OF CONTENTS. REVISION HISTORY. 7/09—Rev. A to Rev. B. …
RevisionB
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DokumentenspracheEnglisch

AD9273. TABLE OF CONTENTS. REVISION HISTORY. 7/09—Rev. A to Rev. B. 4/09—Revision A: Initial Version

AD9273 TABLE OF CONTENTS REVISION HISTORY 7/09—Rev A to Rev B 4/09—Revision A: Initial Version

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AD9273 TABLE OF CONTENTS
Features .. 1  Theory of Operation .. 21  Applications ... 1  Ultrasound .. 21  General Description ... 1  Channel Overview ... 22  Functional Block Diagram .. 1  Input Overdrive .. 25  Revision History ... 2  CW Doppler Operation ... 25  Product Highlights ... 3  TGC Operation ... 27  Specifications ... 4  ADC ... 31  AC Specifications .. 4  Clock Input Considerations .. 31  Digital Specifications ... 8  Serial Port Interface (SPI) .. 38  Switching Specifications .. 9  Hardware Interface ... 38  ADC Timing Diagrams ... 10  Memory Map .. 40  Absolute Maximum Ratings .. 11  Reading the Memory Map Table .. 40  Thermal Impedance ... 11  Reserved Locations .. 40  ESD Caution .. 11  Default Values ... 40  Pin Configuration and Function Descriptions ... 12  Logic Levels ... 40  Typical Performance Characteristics ... 15  Outline Dimensions ... 44  Equivalent Circuits ... 19  Ordering Guide .. 45 
REVISION HISTORY 7/09—Rev. A to Rev. B
Changes to Ultrasound Section .. 21 Added BGA Package .. Universal Changes to Low Noise Amplifier (LNA) Section ... 22 Changes to Features and General Description Sections .. 1 Changes to Active Impedance Matching Section and Changes to Product Highlights Section ... 3 Figure 40 .. 23 Changes to Full-Channel (TGC) Characteristics Parameter, Changes to LNA Noise Section .. 24 Table 1 .. 4 Changes to Input Overload Protection Section and Figure 44 ... 25 Changes to Gain Control Interface Parameter and to CW Changes to Figure 48 .. 28 Doppler Mode Parameter, Table 1 .. 6 Changes to Figure 49 and Figure 50... 29 Change to Wake-Up Time (Standby), GAIN+ = 0.8 V Changes to Clock Input Considerations Section and to Parameter ... 9 Figure 56 to Figure 59 .. 31 Changes to Figure 2 and Figure 3 ... 10 Changes to Digital Outputs and Timing Section ... 33 Changes to Table 4 .. 11 Changes to CSB Pin Section ... 36 Addded Figure 5; Renumbered Sequentially .. 12 Changes to Reading the Memory Map Table Section ... 40 Changes to Table 6 .. 13 Updated Outline Dimensions ... 44 Changes to Figure 34 and Figure 35 ... 20 Changes to Ordering Guide .. 45
4/09—Revision A: Initial Version
Rev. B | Page 2 of 48 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY PRODUCT HIGHLIGHTS SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ADC TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL IMPEDANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ULTRASOUND CHANNEL OVERVIEW Low Noise Amplifier (LNA) Recommendation Active Impedance Matching LNA Noise INPUT OVERDRIVE Input Overload Protection CW DOPPLER OPERATION Crosspoint Switch TGC OPERATION Variable Gain Amplifier Gain Control VGA Noise Antialiasing Filter ADC CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO Pin SCLK Pin CSB Pin RBIAS Pin Voltage Reference Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations SERIAL PORT INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE Caution RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS OUTLINE DIMENSIONS ORDERING GUIDE