RH118 ELECTRICAL CHARACTERISTICS (Continued)Note 1: The inputs are shunted with back-to-back Zeners for overvoltage Note 4: Guaranteed by design, characterization or correlation to other protection. Excessive current will flow if a differential voltage greater than tested parameters. 5V is applied to the inputs. Note 5: Slew rate is 100% tested at wafer probe testing. It is QA sample Note 2: For supply voltages less than ±15V, the maximum input voltage is tested in finished package form. equal to the supply voltage. Note 6: TA = 25°C, VS = ±20V, VCM = 0V, unless otherwise specified. Note 3: These specifications apply for ±5V ≤ VS ≤ ±20V. The power Supply bypassed per Note 3. supplies must be bypassed with a 0.1µF or greater disc capacitor within four inches of the device. TOTAL DOSE BIAS CIRCUIT 10k 15V 2 – 7 6 10k 3 8V + 0.1µF 4 0.1µF –15V RH118 TDBC TABLE 2: ELECTRICAL TEST REQUIREMENTSMIL-STD-883 TEST REQUIREMENTSSUBGROUPPDA Test Notes The PDA is specified as 5% based on failures from group A, subgroup Final Electrical Test Requirements (Method 5004) 1*, 2, 3, 4, 5, 6 1, tests after cooldown as the final electrical test in accordance with Group A Test Requirements (Method 5005) 1, 2, 3, 4, 5, 6 method 5004 of MIL-STD-883 Class B. The verified failures (including Group B and D End Point Electrical Parameters 1, 2, 3 Delta parameters) of group A, subgroup 1, after burn-in divided by the (Method 5005) total number of devices submitted for burn-in in that lot shall be used to *PDA Applies to subgroup 1. See PDA Test Notes. determine the percent for the lot. Analog Devices reserves the right to test to tighter limits than those given. REVISION HISTORYREVDATEDESCRIPTIONPAGE NUMBER C 04/19 Obsolete H + J Package and updating to ADI format I.D.No.66-11-0118 Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications For more information www.a subject to change without notice. No license is granted by implication or other nalog.com wise under any patent or patent rights of Analog Devices. 3 Document Outline Description Burn-In Circuit Package/Order Information Absolute Maximum Ratings Table 1: Electrical Characteristics Table 1A: Electrical Characteristics Electrical Characteristics Total Dose Bias Circuit Table 2: Electrical Test Requirements Revision History