Datasheet AD7176-2 (Analog Devices) - 2

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AD7176-2 Key Sheet KEY CHARACTERISTICS FUNDAMENTAL SPECIFICATIONS Table 1. Parameter Min Typ Max Unit
ADC Type Σ- Δ ADC Number of Input Channels Two fully differential or four pseudo differential input channels Resolution 24 24 Bits Output Data Rate (ODR) 5 250,000 SPS Differential Input Voltage Range ±VREF V Power Supply Voltage AVDD1 with Respect to AVSS 4.5 5.5 V AVDD2 with Respect to AVSS 2 5.5 V IOVDD with Respect to DGND 2 5.5 V Offset Error ±40 µV Gain Error ±10 ±50 ppm/FSR Integral Nonlinearity (INL) With 2.5 V Reference ±2.5 ±7 ppm of FSR With 5 V Reference ±7 ppm of FSR Power Dissipation (AVDD1 = 5 V, AVDD2 = 2 V, IOVDD = 2 V) With External Clock and Reference 20.1 23.15 mW With Internal Clock and Reference 22.25 25.9 mW Operating Temperature Range −40 +105 °C
NOISE Table 2. RMS Noise and Peak-to-Peak Resolution vs. Output Data Rate1 Sinc5 + Sinc1 Filter (Default) Sinc3 Filter Output Data Rate (SPS) Noise (µV rms) Peak-to-Peak Resolution (Bits) Noise (µV rms) Peak-to-Peak Resolution (Bits)
250,000 9.7 17.2 220 12.8 62,500 5.4 18.2 5.1 18.3 10,000 2.5 19 1.8 19.8 1000 0.82 20.8 0.62 21 60 0.46 21.4 0.32 22 50 0.42 21.7 0.31 22 16.7 0.42 21.7 0.29 22.4 5 0.32 22.2 0.29 22.4 1 Selected rates only; 1000 samples. Rev. 0 | Page 2 of 6 Document Outline General Description Features and Benefits Key Characteristics Fundamental Specifications Noise Operating the AD7176-2 Data Interface Accessing the ADC Register Map ADC and Interface Mode Configuration ADC Mode Register Interface Mode Register Data Modes Continuous Conversion Mode (Default) Continuous Read Mode Single Conversion Mode Typical Application Diagram Frequently Asked Questions Learn More and Start Designing Compatible Devices Package Diagram Getting Started