Datasheet ADP7185 (Analog Devices) - 4

HerstellerAnalog Devices
Beschreibung-500 mA, Ultralow Noise, High PSRR, Low Dropout Linear Regulator
Seiten / Seite19 / 4 — ADP7185. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. …
Dateiformat / GrößePDF / 855 Kb
DokumentenspracheEnglisch

ADP7185. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

ADP7185 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit

Modelllinie für dieses Datenblatt

Textversion des Dokuments

ADP7185 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
UNDERVOLTAGE LOCKOUT THRESHOLDS Input Voltage Rising UVLORISE −1.77 V Falling UVLOFALL −1.58 V Hysteresis UVLOHYS 90 mV EN INPUT (NEGATIVE) −2 V ≤ VIN ≤ −5.5 V Logic High VEN-NEG-HIGH VOUT = off to on −1.3 −1.16 V Logic Low VEN-NEG_LOW VOUT = on to off −0.96 -0.88 V Hysteresis ENHYS-NEG 191 mV Leakage Current IEN-LKG EN = VIN or GND −0.25 μA EN INPUT (POSITIVE) −2 V ≤ VIN ≤ −5.5 V Logic High VEN-POS-HIGH VOUT = off to on 0.96 1.25 V Logic Low VEN-POS-LOW VOUT = on to off 0.5 0.89 V Leakage Current IEN-LKG VEN = 5 V, VIN = −5.5 V 4.0 6.0 μA 1 Guaranteed by characterization but not production tested. 2 Based on an endpoint calculation using −1 mA and −500 mA loads. 3 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output voltages below −2 V. 4 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value. 5 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit threshold for a −3.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of −3.0 V, or −2.7 V.
INPUT AND OUTPUT CAPACITOR RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
CAPACITANCE TA = −40°C to +125°C Minimum CIN and COUT Capacitance1 CIN, COUT 3.3 4.7 μF Minimum CA and CREG Capacitance2 CA, CREG 0.7 1 μF Minimum CAFB Capacitance3 CAFB 0.7 10 nF Capacitor Equivalent Series Resistance (ESR) RESR 0.1 Ω 1 The minimum input and output capacitance must be greater than 3.3 μF over the full range of operating conditions. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. 2 The minimum CA and CREG capacitance must be greater than 0.7 μF over the full range of operating conditions. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. 3 The minimum CAFB capacitance must be greater than 0.7 nF over the full range of operating conditions. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. 0 | Page 4 of 19 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE MODE OPERATION ENABLE PIN OPERATION START-UP TIME APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor CA and CAFB Capacitors Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT (UVLO) CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE