Datasheet ADP7185 (Analog Devices)

−500 mA, Ultralow Noise, High PSRR, Low Dropout Linear Regulator Data Sheet ADP7185 FEATURES TYPICAL APPLICATION CIRCUITS Input voltage range: −2.0 V to −5.5 V Maximum output current: −500 mA EP V VIN VOUT V IN = –3.8V OUT = –3.3V Fixed output voltage options: −0.5 V to −4.5 V CIN COUT 4.7µF SENSE 4.7µF Adjustable output from −0.5 V to −VIN + 0.5 V ADP7185 Low output noise: 4 μV rms from 100 Hz to 100 kHz +1.25V VA OFF 0V EN C C Noise spectral density: 20 nV/√Hz, 10 kHz to 1 MHz AFB A 10nF 1µF –1.3V VAFB PSRR at −500 mA load ON 68 dB at 10 kHz VREG GND C
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50 dB at 100 kHz REG 1µF
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40 dB at 1 MHz
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Low dropout voltage: −190 mV typical at −500 mA load
Figure 1. ADP7185 with Fixed Output Voltage, −3.3 V
Initial output voltage (VOUT) accuracy: ±0.5% Output voltage accuracy over line, load, and temperature: EP ±2.2% V VIN VOUT V IN = –3V OUT = –2.5V CIN COUT Operating supply current (I 4.7µF SENSE 4.7µF GND): −0.6 mA typical at no load Low shutdown current: −2 μA typical at V ADP7185 IN = −5.5 V +1.25V VA Stable with small 4.7 μF ceramic input and output capacitor OFF 0V EN R1 C C AFB A 100kΩ 10nF 1µF Positive or negative enable logic –1.3V VAFB ON R2 Current-limit and thermal overload protection VREG GND 24.9kΩ 8-lead, 2 mm × 2 mm LFCSP package CREG 1µF
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Supported by ADIsimPOWER v oltage regulator design tool
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APPLICATIONS
Figure 2. ADP7185 with Adjustable Output Voltage, VOUT = −2.5 V
Regulation to noise sensitive applications: analog-to-digital converters (ADCs), digital-to-analog converters (DACs), precision amplifiers Communications and infrastructure Medical and healthcare Industrial and instrumentation GENERAL DESCRIPTION
The ADP7185 is a complementary metal oxide semiconductor Additional voltages available by special order are −0.8 V, −0.9 V, (CMOS), low dropout (LDO) linear regulator that operates −1.3 V, −2.8 V, −4.2 V, and −4.5 V. An adjustable version is also from −2.0 V to −5.5 V and provides up to −500 mA of output available which allows output voltages that range from −0.5 V to current. This high output current LDO is ideal for regulation of −VIN + 0.5 V with an external feedback divider. high performance analog and mixed signal circuits operating The enable logic feature is capable of interfacing with positive from −0.5 V down to −4.5 V. Using an advanced proprietary or negative logic levels for maximum flexibility. architecture, the ADP7185 provides high power supple rejection ratio (PSRR) and low noise, and it achieves excellent line and load The ADP7185 regulator output noise is 4 μV rms independent transient response with a small 4.7 μF ceramic output capacitor. of the output voltage. The ADP7185 is available in an 8-lead, 2 mm × 2 mm LFCSP, making it not only a very compact The ADP7185 is available in 15 fixed output voltage options. solution but also providing excellent thermal performance for The following voltages are available from stock: −0.5 V, −1.0 V, applications requiring up to −500 mA of output current in a −1.2 V, −1.5 V, −1.8 V, −2.0 V, −2.5 V, −3.0 V, and −3.3 V. small, low profile footprint.
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Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE MODE OPERATION ENABLE PIN OPERATION START-UP TIME APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor CA and CAFB Capacitors Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT (UVLO) CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE