Datasheet LTC3414 (Analog Devices) - 6
| Hersteller | Analog Devices |
| Beschreibung | 4A, 4MHz, Monolithic Synchronous Step-Down Regulator |
| Seiten / Seite | 16 / 6 — BLOCK DIAGRA. OPERATIO Main Control Loop. Forced Continuous Mode |
| Dateiformat / Größe | PDF / 280 Kb |
| Dokumentensprache | Englisch |
BLOCK DIAGRA. OPERATIO Main Control Loop. Forced Continuous Mode
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Textversion des Dokuments
LTC3414
W BLOCK DIAGRA
SVIN SGND I EXPOSED PAD TH PV PV IN IN 16 5 18 21 7 14 PMOS CURRENT SLOPE COMPARATOR 0.8V VOLTAGE COMPENSATION REFERENCE RECOVERY + BCLAMP + – – VFB 19 – ERROR + AMPLIFIER + SLOPE BURST COMPENSATION SYNC/MODE V COMPARATOR 0.74V + 8 SW OSCILLATOR – 9 SW NMOS CURRENT LOGIC COMPARATOR 12 SW RUN/SS 4 RUN – 13 SW + + CURRENT 0.86V – REVERSAL COMPARTOR 1 PGND PGOOD 17 + 10 PGND – 11 PGND 2 3 20 3414 BD RT SYNC/MODE PGND
U OPERATIO Main Control Loop
clock cycle. The bottom current limit is set at –5A for forced continuous mode and 0A for Burst Mode operation. The LTC3414 is a monolithic, constant-frequency, cur- rent-mode step-down DC/DC converter. During normal The operating frequency is externally set by an external operation, the internal top power switch (P-channel MOS- resistor connected between the RT pin and ground. The FET) is turned on at the beginning of each clock cycle. practical switching frequency can range from 300kHz to Current in the inductor increases until the current com- 4MHz. parator trips and turns off the top power MOSFET. The Overvoltage and undervoltage comparators will pull the peak inductor current at which the current comparator PGOOD output low if the output voltage comes out of shuts off the top power switch is controlled by the voltage regulation by ± 7.5%. In an overvoltage condition, the top on the ITH pin. The error amplifier adjusts the voltage on power MOSFET is turned off and the bottom power MOS- the ITH pin by comparing the feedback signal from a FET is switched on until either the overvoltage condition resistor divider on the VFB pin with an internal 0.8V clears or the bottom MOSFET’s current limit is reached. reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference.
Forced Continuous Mode
The error amplifier raises the ITH voltage until the average inductor current matches the new load current. When the Connecting the SYNC/MODE pin to SVIN will disable Burst top power MOSFET shuts off, the synchronous power Mode operation and force continuous current operation. switch (N-channel MOSFET) turns on until either the At light loads, forced continuous mode operation is less bottom current limit is reached or the beginning of the next efficient than Burst Mode operation, but may be desirable in some applications where it is necessary to keep switch- 3414fb 6
W BLOCK DIAGRA
SVIN SGND I EXPOSED PAD TH PV PV IN IN 16 5 18 21 7 14 PMOS CURRENT SLOPE COMPARATOR 0.8V VOLTAGE COMPENSATION REFERENCE RECOVERY + BCLAMP + – – VFB 19 – ERROR + AMPLIFIER + SLOPE BURST COMPENSATION SYNC/MODE V COMPARATOR 0.74V + 8 SW OSCILLATOR – 9 SW NMOS CURRENT LOGIC COMPARATOR 12 SW RUN/SS 4 RUN – 13 SW + + CURRENT 0.86V – REVERSAL COMPARTOR 1 PGND PGOOD 17 + 10 PGND – 11 PGND 2 3 20 3414 BD RT SYNC/MODE PGND
U OPERATIO Main Control Loop
clock cycle. The bottom current limit is set at –5A for forced continuous mode and 0A for Burst Mode operation. The LTC3414 is a monolithic, constant-frequency, cur- rent-mode step-down DC/DC converter. During normal The operating frequency is externally set by an external operation, the internal top power switch (P-channel MOS- resistor connected between the RT pin and ground. The FET) is turned on at the beginning of each clock cycle. practical switching frequency can range from 300kHz to Current in the inductor increases until the current com- 4MHz. parator trips and turns off the top power MOSFET. The Overvoltage and undervoltage comparators will pull the peak inductor current at which the current comparator PGOOD output low if the output voltage comes out of shuts off the top power switch is controlled by the voltage regulation by ± 7.5%. In an overvoltage condition, the top on the ITH pin. The error amplifier adjusts the voltage on power MOSFET is turned off and the bottom power MOS- the ITH pin by comparing the feedback signal from a FET is switched on until either the overvoltage condition resistor divider on the VFB pin with an internal 0.8V clears or the bottom MOSFET’s current limit is reached. reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference.
Forced Continuous Mode
The error amplifier raises the ITH voltage until the average inductor current matches the new load current. When the Connecting the SYNC/MODE pin to SVIN will disable Burst top power MOSFET shuts off, the synchronous power Mode operation and force continuous current operation. switch (N-channel MOSFET) turns on until either the At light loads, forced continuous mode operation is less bottom current limit is reached or the beginning of the next efficient than Burst Mode operation, but may be desirable in some applications where it is necessary to keep switch- 3414fb 6