Datasheet LTC3414 (Analog Devices) - 10

LTC3414
U U W U APPLICATIO S I FOR ATIO Burst Clamp Programming Frequency Synchronization
If the voltage on the SYNC/MODE pin is less than VIN by 1V, The LTC3414’s internal oscillator can be synchronized to Burst Mode operation is enabled. During Burst Mode an external clock signal. During synchronization, the top Operation, the voltage on the SYNC/MODE pin determines MOSFET turn-on is locked to the
falling
edge of the the burst clamp level, which sets the minimum peak external frequency source. The synchronization frequency inductor current, IBURST, for each switching cycle accord- range is 300kHz to 4MHz. Synchronization only occurs if ing to the following equation: the external frequency is greater than the frequency set ⎛ by the external resistor. Because slope compensation is 6. A 9 ⎞ I = V – 0. V generated by the oscillator’s RC circuit, the external BURST BURST 383 ⎝⎜ 0. V 6 ⎠⎟( ) frequency should be set 25% higher than the frequency set by the external resistor to ensure that adequate slope VBURST is the voltage on the SYNC/MODE pin. IBURST can compensation is present. only be programmed in the range of 0A to 7A. For values of VBURST greater than 1V, IBURST is set at 7A. For values
Soft-Start
of VBURST less than 0.4V, IBURST is set at 0A. As the output load current drops, the peak inductor currents decrease to The RUN/SS pin provides a means to shut down the keep the output voltage in regulation. When the output LTC3414 as well as a timer for soft-start. Pulling the load current demands a peak inductor current that is less RUN/SS pin below 0.5V places the LTC3414 in a low than I quiescent current shutdown state (IQ < 1μA). BURST, the burst clamp will force the peak inductor current to remain equal to IBURST regardless of further The LTC3414 contains an internal soft-start clamp that reductions in the load current. Since the average inductor gradually raises the clamp on ITH after the RUN/SS pin is current is greater than the output load current, the voltage pulled above 2V. The full current range becomes available on the ITH pin will decrease. When the ITH voltage drops on ITH after 1024 switching cycles. If a longer soft-start to 150mV, sleep mode is enabled in which both power period is desired, the clamp on ITH can be set externally MOSFETs are shut off along with most of the circuitry to with a resistor and capacitor on the RUN/SS pin as shown minimize power consumption. All circuitry is turned back in Figure 1. The soft-start duration can be calculated by on and the power MOSFETs begin switching again when using the following formula: the output voltage drops out of regulation. The value for I ⎛ V ⎞ BURST is determined by the desired amount of output t = R C IN ln SECONDS ( ) voltage ripple. As the value of I SS SS SS BURST increases, the sleep ⎝⎜ V – 1. V IN 8 ⎠⎟ period between pulses and the output voltage ripple in- crease. The burst clamp voltage, VBURST, can be set by a
Efficiency Considerations
resistor divider from the VFB pin to the SGND pin as shown The efficiency of a switching regulator is equal to the in Figure 1. output power divided by the input power times 100%. It is Pulse skipping, which is a compromise between low often useful to analyze individual losses to determine what output voltage ripple and efficiency, can be implemented is limiting the efficiency and which change would produce by connecting pin SYNC/MODEto ground. This sets IBURST the most improvement. Efficiency can be expressed as: to 0A. In this condition, the peak inductor current is limited Efficiency = 100% – (L1 + L2 + L3 + ...) by the minimum on-time of the current comparator. The lowest output voltage ripple is achieved while still operat- where L1, L2, etc. are the individual losses as a percentage ing discontinuously. During very light output loads, pulse of input power. skipping allows only a few switching cycles to be skipped Although all dissipative elements in the circuit produce while maintaining the output voltage in regulation. losses, two main sources usually account for most of the losses: VIN quiescent current and I2R losses. 3414fb 10