Datasheet LTC3541-1 (Analog Devices) - 10

LTC3541-1
OPERATION
buck regulator without the need for external pin control. When the MODE pin is driven to a logic high the LTC3541-1 A detailed discussion of the transitions between the VLDO operates in Pulse-Skip mode for low output voltage ripple. and linear regulator can be found in the VLDO/Linear In this mode, the LTC3541-1 continues to switch at a Regulator Loop section. constant frequency down to very low currents, where it will begin skipping pulses used to control the main (top)
Buck Regulator Control Loop
switch to maintain the proper average inductor current. The LTC3541-1 internal buck regulator uses a constant If the input supply voltage is decreased to a value ap- frequency, current mode, step-down architecture. Both the proaching the output voltage, the duty cycle of the buck main (top, P-channel MOSFET) and synchronous (bottom, is increased toward maximum on-time and 100% duty N-channel MOSFET) switches are internal. During normal cycle. The output voltage will then be determined by the operation, the internal main switch is turned on at the be- input voltage minus the voltage drop across the main ginning of each clock cycle provided the internal feedback switch and the inductor. voltage to the buck is less than the reference voltage. The current into the inductor provided to the load increases
VLDO/Linear Regulator Loop
until the current limit is reached. Once the current limit is In the LTC3541-1, the VLDO and linear regulator loops reached the main switch turns off and the energy stored consist of an amplifier and N-channel MOSFET output in the inductor flows through the bottom synchronous stages that, when connected with the proper external switch into the load until the next clock cycle. components, will servo the output to maintain a regula- The peak inductor current is determined by comparing the tor output voltage, LVOUT. The internal reference voltage buck feedback signal to an internal 0.8V reference. When provided to the amplifier is 0.4V allowing for a wide range the load current increases, the output of the buck and of output voltages. Loop configurations enabling the VLDO hence the buck feedback signal decrease. This decrease or the linear regulator are stable with an output capacitance causes the peak inductor current to increase until the aver- as low as 2.2μF and as high as 100μF. Both the VLDO age inductor current matches the load current. While the and the linear regulators are capable of operating with an main switch is off, the synchronous switch is turned on input voltage, VIN, as low as 2.7V, but are subject to the until either the inductor current starts to reverse direction constraint that VIN must be greater than LVOUT + 1.4V. or the beginning of a new clock cycle. The VLDO is designed to provide up to 300mA of output When the MODE pin is driven to a logic low, the LTC3541-1 current at a very low LVIN to LVOUT voltage. This allows buck regulator operates in Burst Mode operation for high a clean, secondary, analog supply voltage to be provided efficiency. In this mode, the main switch operates based with a minimum drop in efficiency. The VLDO is provided upon load demand. In Burst Mode operation the peak with thermal protection that is designed to disable the inductor current is set to a fixed value, where each burst VLDO function when the output, pass transistor’s junction event can last from a few clock cycles at light loads to nearly temperature reaches approximately 160°C. In addition to continuous cycling at moderate loads. Between burst events thermal protection, short-circuit detection is provided to the main switch and any unneeded circuitry are turned off, disable the VLDO function when a short-circuit condition reducing the quiescent current. In this sleep state, the load is sensed. This circuit is designed such that an output is being supplied solely from the output capacitor. As the current of approximately 1A can be provided before this output voltage droops, an internal error amplifier’s output circuit will trigger. As detailed in the Electrical Character- rises until a wake threshold is reached causing the main istics, the VLDO regulator will be out of regulation when switch to again turn on. This process repeats at a rate that this event occurs. Both the thermal and short-circuit faults is dependent upon the load current demand. when detected are treated as catastrophic fault condi- 35411fb 10 For more information www.linear.com/LTC3541-1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Related Parts