Datasheet ADP5014 (Analog Devices) - 2

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ADP5014 Data Sheet TABLE OF CONTENTS
Features .. 1  Overvoltage Protection .. 20  Applications ... 1  Undervoltage Lockout ... 20  Typical Application Circuit ... 1  Active Output Discharge Switch .. 21  General Description ... 1  Thermal Shutdown .. 21  Revision History ... 2  Applications Information .. 22  Detailed Functional Block Diagram .. 3  ADIsimPower Design Tool ... 22  Specifications ... 4  Programming the Output Voltage ... 22  Buck Regulator Specifications .. 5  Voltage Conversion Limitations ... 22  Absolute Maximum Ratings .. 7  Current-Limit Setting .. 23  Thermal Resistance .. 7  Soft Start Setting ... 23  ESD Caution .. 7  Inductor Selection .. 23  Pin Configuration and Function Descriptions ... 8  Output Capacitor Selection ... 24  Typical Performance Characteristics ... 10  Input Capacitor Selection .. 24  Theory of Operation .. 14  Programming the UVLO Input .. 24  Buck Regulator Operational Modes ... 14  Compensation Components Design ... 24  Low Noise Architecture ... 14  Power Dissipation... 25  Internal Reference (VREF) .. 14  Junction Temperature .. 26  Adjustable Output Voltage .. 14  Design Examples .. 27  Function Configurations (CFG1 and CFG2) ... 15  Setting the Switching Frequency .. 27  Parallel Operation... 16  Setting the Output Voltage .. 27  Manual/Sequence Mode .. 16  Setting the Configuations (CFG1 and CFG2) .. 27  General Purpose Input/Output (GPIO) .. 18  Selecting the Inductor .. 27  Oscillator ... 18  Selecting the Output Capacitor .. 28  Synchronization Input/Output ... 19  Designing the Compensation Network ... 28  Power-Good Function ... 19  Low Noise Output Design ... 28  UV Comparator (Sequence Mode Only) .. 19  PCB Layout Recommendations .. 30  Soft Start .. 20  Typical Application Circuits ... 31  Startup with Precharged Output .. 20  Factory Programmable Options ... 33  Current-Limit Protection .. 20  Factory Default Options .. 33  Frequency Fold Back .. 20  Outline Dimensions ... 34  Short-Circuit Protection (SCP) .. 20  Ordering Guide .. 34 
REVISION HISTORY 6/2017—Revision 0: Initial Version
Rev. 0 | Page 2 of 34 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BUCK REGULATOR OPERATIONAL MODES PWM Mode PSM Mode FPWM and Automatic PWM/PSM Modes LOW NOISE ARCHITECTURE INTERNAL REFERENCE (VREF) ADJUSTABLE OUTPUT VOLTAGE FUNCTION CONFIGURATIONS (CFG1 AND CFG2) PARALLEL OPERATION MANUAL/SEQUENCE MODE Manual Mode (Precision Enable) Sequence Mode GENERAL PURPOSE INPUT/OUTPUT (GPIO) OSCILLATOR Phase Shift SYNCHRONIZATION INPUT/OUTPUT POWER-GOOD FUNCTION UV COMPARATOR (SEQUENCE MODE ONLY) SOFT START STARTUP WITH PRECHARGED OUTPUT CURRENT-LIMIT PROTECTION FREQUENCY FOLD BACK SHORT-CIRCUIT PROTECTION (SCP) OVERVOLTAGE PROTECTION UNDERVOLTAGE LOCKOUT ACTIVE OUTPUT DISCHARGE SWITCH THERMAL SHUTDOWN APPLICATIONS INFORMATION ADIsimPOWER DESIGN TOOL PROGRAMMING THE OUTPUT VOLTAGE VOLTAGE CONVERSION LIMITATIONS CURRENT-LIMIT SETTING SOFT START SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION INPUT CAPACITOR SELECTION PROGRAMMING THE UVLO INPUT COMPENSATION COMPONENTS DESIGN POWER DISSIPATION Buck Regulator Power Dissipation Power Switch Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Thermal Shutdown JUNCTION TEMPERATURE DESIGN EXAMPLES SETTING THE SWITCHING FREQUENCY SETTING THE OUTPUT VOLTAGE SETTING THE CONFIGUATIONS (CFG1 AND CFG2) SELECTING THE INDUCTOR SELECTING THE OUTPUT CAPACITOR DESIGNING THE COMPENSATION NETWORK PCB LAYOUT RECOMMENDATIONS TYPICAL APPLICATION CIRCUITS FACTORY PROGRAMMABLE OPTIONS FACTORY DEFAULT OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE