Datasheet LT3710 (Analog Devices) - 9

LT3710
U U W U APPLICATIO S I FOR ATIO Output Inductor Selection
The RDS(ON) of the MOSFETs should be selected to deliver the required current at the desired efficiency as well as to The key parameters for choosing the inductor include meet the thermal requirement of the MOSFET package. inductance, RMS and saturation current ratings and DCR. The conduction power losses of the MOSFETs are: The inductance must be selected to achieve a reasonable value of ripple current, which is determined by: P 2 M1 ≅ IO • RDS(ON)M1 • D2 P 2 • R V M2 ≅ IO DS(ON)M2 • (1 – D2) OUT2 • (1− D ) ∆ 2 IL = f • L where IO is the maximum output current of LT3710 circuit, RDS(ON)M1 and RDS(ON)M2 are the on-resistance for the top Typically, the inductor ripple current is designed to be and bottom MOSFETs, respectively. The RDS(ON) must be 20% to 40% of the maximum output current. determined with 6.5V gate drive and the expected operat- The RMS current rating must be high enough to deliver the ing temperature. maximum output current. A sufficient saturation current A good number of high performance power MOSFET rating should prevent the inductor core from saturating. selections are available from Siliconix, International Rec- These two current ratings can be determined by: tifier and Fairchild. If the VDSS and RDS(ON) ratings are the same, the MOSFETs with the lowest gate charge QG should 2 be chosen to minimize the power loss associated with the 2 I I ≥ I LMAX RMS O + ∆ MOSFET gate drives, the switching transitions and the 12 controller bias supply. I I ≥ I LMAX SAT O + ∆ 2
Output Capacitor Selection
where I The selection of the output capacitor is determined by the O is the maximum output current and ∆ILMAX is the maximum peak-to-peak inductor ripple current. output ripple and load transient requirements. In low output voltage applications, always choose capacitors To optimize the efficiency, we usually choose the inductor with low ESR. The output ripple voltage is approximated with the minimum DCR if the inductance and current by: ratings are the same.  1 
Power MOSFET Selection
∆VOUT ≈ ∆I ESR L +  fC 8 OUT  The LT3710 drives two external N-channel MOSFETs to deliver high currents at high efficiency. The gate drive where ∆IL is the inductor peak-to-peak ripple current. voltage is typically 6.5V. The key parameters for choos- A partial list of low ESR high performance capacitor types ing MOSFETs include drain to source voltage rating VDSS includes SP capacitors from Panasonic and Cornell Dubilier, and RDS(ON) at 6.5V gate drive. Note that the transformer POSCAPs and OS-CON capacitors from Sanyo, T510 and secondary voltage waveform will overshoot at its rising T520 surface mount capacitors from Kemet. edge due to the ringing between transformer leakage inductance and parasitic capacitance. The VDSS of both
Design Example
top and bottom MOSFETs must be sufficiently higher than the maximum overshoot. It is recommended that an Figure 3 shows an application example for the LT3710. It RC snubber or a voltage clamping circuitry be placed is a dual output, high efficiency, isolated DC/DC power across the transformer secondary winding to limit the V supply with 36V to 72V input, 3.3V/10A and 1.8V/10A S overshoot. outputs. The basic power stage topology is a 2-transistor 3710f 9