Datasheet LT3710 (Analog Devices) - 8

HerstellerAnalog Devices
BeschreibungSecondary Side Synchronous Post Regulator
Seiten / Seite12 / 8 — APPLICATIO S I FOR ATIO. Output N-Channel MOSFET Drivers. Layout …
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DokumentenspracheEnglisch

APPLICATIO S I FOR ATIO. Output N-Channel MOSFET Drivers. Layout Considerations. Light Load Operation

APPLICATIO S I FOR ATIO Output N-Channel MOSFET Drivers Layout Considerations Light Load Operation

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LT3710
U U W U APPLICATIO S I FOR ATIO Output N-Channel MOSFET Drivers
discharging the output, which would cause the output to undershoot below ground. The LT3710 employs high speed N-channel MOSFET synchronous drivers to achieve high system efficiency.
Layout Considerations
GBIAS is the 8V regulator output to bias and supply the drivers and should be properly bypassed with a low ESR For maximum efficiency, the switching rise and fall times capacitor to ground plane. A Schottky catch diode is are less than 20ns. To prevent radiation, the power required on the switch node. MOSFETs, SW pin and input bypass capacitor leads should be kept as short as possible. A ground plane should be
Light Load Operation
used under the switching circuitry to prevent interplane coupling and to act as a thermal spreading path. Note that If the BGS pin is grounded, the LT3710 stays in continuous the bottom metal of the package is the heat sink, as well as mode independent of load condition except in soft-start the IC signal ground, and must be soldered to the ground operation (see Soft-Start section). If the BGS pin is left plane. open, under light load and VRS1 drops below 8mV, BGATE will be turned off(see comparator CA2 of Block Diagram)
Output Voltage Programming
and the LT3710 goes into discontinous mode operation. The feedback reference voltage is 0.8V. The output voltage
Current Limit
can be easily programmed by the resistor divider, R3 and R4, as shown in the Block Diagram. Current limit is set by the 70mV threshold across CL+ and CL–, the inputs of the amplifier CA1. By connecting an  R3 external resistor RS1(see Block Diagram), the current VOUT2 = 0.8 • 1+   limit is set for 70mV/R R4 S1. R6 and C6 stablize the current limit loop. If current limit is not used, both CL+ and CL– should be grounded and the BGS pin should also be
Filtering on the SYNC Input
grounded to disable comparator CA2. It is necessary to add RC filtering on the SYNC input of the LT3710 to eliminate the negative glitch at the turn on of the
Soft-Start and Shutdown
top MOSFET. When the top MOSFET M1 turns on, the During soft-start, V transformer secondary current instantly changes from the SS is the reference voltage that controls the output voltage and the output ramps up following V original first output inductor current to the sum of two SS. The effective range of V output inductor currents. The high di/dt on the trans- SS is from 0V to VREF. The typical time for the output to reach the programmed level is former leakage inductance causes the transformer sec- (C • 0.8V)/10µA. ondary voltage VS to drop for a short interval. If the leakage inductance is large enough, the V During start up, BGATE will stay off until V S dip will be lower than SS gets up to the synchronization threshold (about 2.5V), falsely trig- 1.6V. This prevents the bottom MOSFET from turning on gering the synchronization. The top MOSFET is turned off if the output is precharged. immediately. As a result, the output voltage will not be To shut down the LT3710, the SS pin should be pulled regulated properly. below 50mV by a VN2222 type N-channel transistor. Note A filter circuit is needed to ensure proper operation. A that during shutdown BGATE will be locked off when VSS small RC filter with R drops below 0.6V. This prevents the bottom MOSFET from S = 10k and CS = 10pF are typical. 3710f 8