Datasheet LT3750 (Analog Devices) - 6

LT3750
U OPERATIO
The LT3750 is designed to charge capacitors quickly and
2. Primary Side Charging
efficiently. Operation can be best understood by referring When the NMOS on latch is set, the gate driver rapidly to Figures 1 and 2. Operation proceeds in four phases: charges the gate pin to V 1. Start-up, 2. Primary-side charging, 3. Secondary en- CC – 2V. The external NMOS turns on forcing V ergy transfer, 4. Discontinuous mode sensing. TRANS – VDS(ON) across the primary winding. Consequently, current in the primary coil rises linearly at
1. Start-Up
ILPRI VTRANS – VDS(ON) Start-up occurs for approximately 20µs after the charge IPK LPRI pin is raised high. During this phase, a one-shot enables the master latch and turns on the NMOS. The master latch will remain in the set state until the target output voltage is reached or a fault condition resets it. ILSEC ILSEC S2 1:N V V OUT + VDIODE TRANS + + IPK L • SEC I N LPRI VPRI VSEC • – – 3750 F01a + VPRI VTRANS – VDS(ON) S1 VDRAIN –
(1a) Equivalent Circuit During Primary-Side Charging
ILSEC S2 –(V 1:N OUT + VDIODE) VTRANS + + N • ILPRI VSEC VPRI VSEC VOUT + VDIODE • – – 3750 F01b + V S1 DRAIN –
(1b) Equivalent Circuit During Secondary Energy Transfer and Output Detection
–N (VTRANS – VDS(ON)) ILSEC S2 1:N VOUT + VDIODE V V TRANS + + V TRANS + DRAIN N • ILPRI V V TRANS PRI VSEC • – – 3750 F01c + V S1 DRAIN V V DS(ON) DS(ON) – 3750 F02 1. 2. 3.
(1c) Equivalent Circuit During Discontinuous Mode Detection
PRIMARY-SIDE SECONDARY DISCONTINUOUS CHARGING ENERGY TRANSFER MODE AND OUTPUT DETECTION
Figure 1. Equivalent Circuits
DETECTION
Figure 2. Idealized Charging Waveforms
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