Datasheet ADF5002 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | 4 GHz TO 18 GHz Divide-by-8 Prescaler |
| Seiten / Seite | 12 / 9 — ADF5002. OUTLINE DIMENSIONS. 3.10. 0.30. 3.00 SQ. 0.25. PIN 1. 2.90. … |
| Dateiformat / Größe | PDF / 252 Kb |
| Dokumentensprache | Englisch |
ADF5002. OUTLINE DIMENSIONS. 3.10. 0.30. 3.00 SQ. 0.25. PIN 1. 2.90. 0.18. INDICATOR. 0.50. BSC. EXPOSED. 1.60. PAD. 1.50 SQ 1.40. 0.45. 0.25 MIN. TOP VIEW
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ADF5002 OUTLINE DIMENSIONS 3.10 0.30 3.00 SQ 0.25 PIN 1 2.90 0.18 PIN 1 INDICATOR INDICATOR 0.50 13 16 12 1 BSC EXPOSED 1.60 PAD 1.50 SQ 1.40 9 4 8 5 0.45 0.25 MIN TOP VIEW 0.40 BOTTOM VIEW 0.35 0.80 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO 0.75 0.05 MAX THE PIN CONFIGURATION AND 0.70 0.02 NOM FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 PLANE 0.20 REF -A 08 18 COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 11
Figure 11. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm × 3 mm Body, Very Very Thin Quad (CP-16-18) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding
ADF5002BCPZ −40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_WQ) CP-16-18 Q1U ADF5002BCPZ-RL7 −40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_WQ), CP-16-18 Q1U 7” Tape and Reel EVAL-ADF5002EB2Z Evaluation Board 1 Z = RoHS Compliant Part. Rev. 0 | Page 9 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EVALUATION BOARD PCB PCB MATERIAL STACK-UP BILL OF MATERIALS APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE
ADF5002 OUTLINE DIMENSIONS 3.10 0.30 3.00 SQ 0.25 PIN 1 2.90 0.18 PIN 1 INDICATOR INDICATOR 0.50 13 16 12 1 BSC EXPOSED 1.60 PAD 1.50 SQ 1.40 9 4 8 5 0.45 0.25 MIN TOP VIEW 0.40 BOTTOM VIEW 0.35 0.80 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO 0.75 0.05 MAX THE PIN CONFIGURATION AND 0.70 0.02 NOM FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 PLANE 0.20 REF -A 08 18 COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 11
Figure 11. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm × 3 mm Body, Very Very Thin Quad (CP-16-18) Dimensions shown in millimeters
ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding
ADF5002BCPZ −40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_WQ) CP-16-18 Q1U ADF5002BCPZ-RL7 −40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_WQ), CP-16-18 Q1U 7” Tape and Reel EVAL-ADF5002EB2Z Evaluation Board 1 Z = RoHS Compliant Part. Rev. 0 | Page 9 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EVALUATION BOARD PCB PCB MATERIAL STACK-UP BILL OF MATERIALS APPLICATION CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE