Datasheet AD7741, AD7742 (Analog Devices) - 7

AD7741/AD7742 TERMINOLOGY GENERAL DESCRIPTION INTEGRAL NONLINEARITY
The AD7741/AD7742 are a new generation of CMOS synchro- For the VFC, Integral Nonlinearity (INL) is a measure of the nous Voltage-to-Frequency Converters (VFCs) that use a maximum deviation from a straight line passing through the charge-balance conversion technique. The AD7741 is a single- actual endpoints of the VFC transfer function. The error is channel version and the AD7742 is a multichannel version. The expressed in % of the frequency span: input voltage signal is applied to a proprietary programmable Frequency Span = f gain front-end based around an analog modulator that converts OUT(max) – fOUT(min) the input voltage into an output pulse train.
OFFSET ERROR
The parts also contain an on-chip +2.5 V bandgap reference This is a measure of the offset error of the VFC. Ideally, the and operate from a single +5 V supply. A block diagram of the minimum output frequency (corresponding to minimum input AD7742 is shown in Figure 2. voltage) is 5% of fCLKIN The deviation from this value is the offset error. It is expressed in terms of the error referred to the
INTEGRATOR COMPARATOR VIN1
input voltage. It is expressed in mV.
SWITCHED CAPS V f IN2 OUT INPUT MUX GAIN ERROR VIN3 SWITCHED
This is a measure of the span error of the VFC. The gain is the
CAPS VIN4
scale factor that relates the input VIN to the output fOUT. The gain error is the deviation in slope of the actual VFC transfer Figure 2. AD7742 Block Diagram characteristic from the ideal expressed as a percentage of the full-scale span.
Input Amplifier Stage
The buffered input stage for the analog inputs presents a high
OFFSET ERROR DRIFT
impedance, allowing significant external source impedances. This is a measure of the change in Offset Error with changes in The four analog inputs (VIN1 through VIN4) each have a voltage temperature. It is expressed in µV/°C. range from +0.5 V to VDD – 1.75 V. This is an absolute voltage range and is relative to the GND pin.
GAIN ERROR DRIFT
In the case of the AD7742 multichannel part, a differential This is a measure of the change in Gain Error with changes in multiplexer switches one of the differential input channels to the temperature. It is expressed in (ppm of span)/°C. VFC modulator. The multiplexer is controlled by two pins, A1 and A0. See Table I for channel configurations.
POWER-SUPPLY REJECTION RATIO (PSRR)
This indicates how the output of the VFC is affected by changes
Table I. AD7742 Input Channel Selection
in the supply voltage. Again, this error is referred to the input voltage. The input voltage is kept constant and the VDD supply
A1 A0 VIN(+) VIN(–) Type
is varied ± 5%. The ratio of the apparent change in input voltage 0 0 V to the change in V IN1 VIN4 Pseudo Differential DD is measured in dBs. 0 1 VIN2 VIN4 Pseudo Differential 1 0 V
CHANNEL-TO-CHANNEL ISOLATION
IN3 VIN4 Full Differential 1 1 V This is a ratio of the amplitude of the signal at the input of one IN1 VIN2 Full Differential channel to a sine wave on the input of another channel. It is
Analog Input Ranges
measured in dBs. The AD7741 has a unipolar single-ended input channel whereas the AD7742 contains four input channels which may be con-
COMMON-MODE REJECTION
figured as two fully differential channels or as three pseudo- For the AD7742, the output frequency should remain un- differential channels. The AD7742 also has a X1/X2 gain changed provided the differential input remains unchanged option on the front end. The channel and gain settings are although its common-mode level may change. The CMR is the pin-programmable. ratio of the apparent change in differential input voltage to the actual change in common-mode voltage. It is expressed in dBs. The AD7742 uses differential inputs to provide common-mode noise rejection (i.e., the converted result will correspond to the differential voltage between the two inputs). The absolute voltage on both inputs must lie between +0.5 V and VDD –1.75 V. REV. 0 –7–