Datasheet AD8314 (Analog Devices) - 4

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AD8314 SPECIFICATIONS
VS = 3 V, TA = 25°C, unless otherwise noted.
Table 1. Parameter Conditions Min Typ Max Unit
OVERALL FUNCTION Frequency Range1 To meet all specifications 0.1 2.5 GHz Input Voltage Range Internally ac-coupled 1.25 224 mV rms Equivalent Power Range 52.3 Ω external termination −45 0 dBm Logarithmic Slope Main output, V_UP, 100 MHz2 18.85 21.3 23.35 mV/dB Logarithmic Intercept Main output, V_UP, 100 MHz −68 −62 −56 dBV Equivalent dBm Level 52.3 Ω external termination −55 −49 −43 dBm INPUT INTERFACE Pin RFIN DC Resistance to COMM 100 kΩ Inband Input Resistance f = 0.1 GHz 3 kΩ Input Capacitance f = 0.1 GHz 2 pF MAIN OUTPUT Pin V_UP Voltage Range V_UP connected to VSET 0.01 1.2 V Minimum Output Voltage No signal at RFIN, RL ≥ 10 kΩ 0.01 0.02 0.05 V Maximum Output Voltage3 RL ≥ 10 kΩ 1.9 2 V General Limit 2.7 V ≤ VS ≤ 5.5 V VS − 1.1 VS − 1 V Available Output Current Sourcing/sinking 1/0.5 2/1 mA Response Time 10% to 90%, 10 dB step 70 ns Residual RF (at 2f ) f = 0.1 GHz (worst condition) 100 μV INVERTED OUTPUT Pin V_DN Gain Referred to V_UP VDN = 2.25 V − 2 × VUP −2 Minimum Output Voltage VS ≥ 3.3 V 0.01 0.05 0.1 V Maximum Output Voltage VS ≥ 3.3 V4 2.1 2.2 2.5 V Available Output Current Sourcing/sinking 4/100 6/200 mA/μA Output-Referred Noise RF input = 2 GHz, –33 dBV, fNOISE = 10 kHz 1.05 μV/√Hz Response Time 10% to 90%, 10 dB input step 70 ns Full-Scale Settling Time −40 dBm to 0 dBm input step to 95% 150 ns SETPOINT INPUT Pin VSET Voltage Range Corresponding to central 40 dB 0.15 1.2 V Input Resistance 7 10 kΩ Logarithmic Scale Factor f = 0.900 GHz 20.7 mV/dB f = 1.900 GHz 19.7 mV/dB ENABLE INTERFACE Pin ENBL Logic Level to Enable Power HI condition, −40°C ≤ TA ≤ +85°C 1.6 VPOS V Input Current when HI 2.7 V at ENBL, −40°C ≤ TA ≤ +85°C 20 300 μA Logic Level to Disable Power LO condition, −40°C ≤ TA ≤ +85°C −0.5 +0.8 V POWER INTERFACE Pin VPOS Supply Voltage 2.7 3.0 5.5 V Quiescent Current 3.0 4.5 5.7 mA Overtemperature −40°C ≤ TA ≤ +85°C 2.7 4.4 6.6 mA Total Supply Current when Disabled 20 95 μA Overtemperature −40°C ≤ TA ≤ +85°C 40 μA 1 For a discussion on operation at higher frequencies, see Applications section. 2 Mean and standard deviation specifications are available in Table 4. 3 Increased output possible when using an attenuator between V_UP and VSET to raise the slope. 4 Refer to Figure 22 for details. Rev. B | Page 3 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INVERTED OUTPUT APPLICATIONS BASIC CONNECTIONS TRANSFER FUNCTION IN TERMS OF SLOPE AND INTERCEPT dBV VS. dBm FILTER CAPACITOR OPERATING IN CONTROLLER MODE POWER-ON AND ENABLE GLITCH INPUT COUPLING OPTIONS INCREASING THE LOGARITHMIC SLOPE IN MEASUREMENT MODE EFFECT OF WAVEFORM TYPE ON INTERCEPT MOBILE HANDSET POWER CONTROL EXAMPLES OPERATION AT 2.7 GHz USING THE LFCSP PACKAGE EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE