Datasheet ADL5205 (Analog Devices) - 4

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Data Sheet ADL5205 SPECIFICATIONS
Supply voltage (VPOS) = 3.3 V or 5 V, TA = 25°C, ZLOAD = 200 Ω, maximum gain (Gain code = 000000), frequency = 200 MHz, PM = 0 V, 2 V p-p differential output, unless otherwise noted.
Table 1. 3.3 V Supply 5 V Supply Parameter1 Test Conditions/Comments Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth High performance mode 1700 1700 MHz Low power mode 1500 1500 MHz Slew Rate 5 5 V/ns INPUT STAGE VINx+ and VINx− pins Maximum Input Swing Gain code = 111111 8 8 V p-p Differential Input Resistance Differential 100 100 Ω Input Common-Mode Voltage 1.65 2.5 V Common-Mode Rejection Ratio (CMRR) Gain code = 000000 48 48 dB GAIN Voltage Gain Range 35 35 dB Maximum Gain Gain code = 000000 26 26 dB Minimum Gain Gain code = 100011 to 111111 −9 −9 dB Gain Step Size 1 1 dB Gain Step Accuracy ±0.2 ±0.2 dB Gain Flatness From 30 MHz to 200 MHz 0.2 0.2 dB p-p Gain Temperature Sensitivity Gain code = 000000 2.4 4 mdB/°C Fast Attack Step Response Delay For VIN = 0.1 V, FA_A or FA_B 15 80 ns changing from 0 to 1 with 16 dB step COMMON-MODE INPUTS VCMA and VCMB Input Resistance 2.6 2.6 kΩ OUTPUT STAGE VOUTx+ and VOUTx− pins Output Voltage Swing At P1dB, gain code = 000000 4.5 5.4 V p-p Common-Mode Voltage Reference VCMA, VCMB 1.2 1.65 1.8 1.4 2.5 2.7 V Output Common-Mode Offset ((VOUTx+) + (VOUTx−))/2 − VCMx/2 −10 +10 −10 +10 mV Differential Output Resistance Differential 10 10 Ω Short-Circuit Current High performance mode 22 22 mA Low power mode 17 17 mA NOISE/HARMONIC PERFORMANCE Gain code = 000000, high performance mode 10 MHz Noise Figure 6.3 6.5 dB Second Harmonic VOUT = 2 V p-p −103 −103 dBc Third Harmonic VOUT = 2 V p-p −101 −100 dBc Output Third-Order Intercept (OIP3) VOUT = 2 V p-p composite 48.5 47 dBm Output 1 dB Compression Point 13.7 17.5 dBm (P1dB) 100 MHz Noise Figure 6.3 6.6 dB Second Harmonic VOUT = 2 V p-p −86 −90 dBc Third Harmonic VOUT = 2 V p-p −87 −94 dBc OIP3 VOUT = 2 V p-p composite 45 46 dBm Output P1dB 13.2 17.4 dBm Rev. 0 | Page 3 of 31 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE JUNCTION TO BOARD THERMAL IMPEDANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC STRUCTURE CONTROL/LOGIC CIRCUITRY COMMON-MODE VOLTAGE APPLICATIONS INFORMATION BASIC CONNECTIONS DIGITAL INTERFACE OVERVIEW Parallel Digital Interface Serial Peripheral Interface (SPI) Up/Down Interface SPI READ ADC INTERFACING NOISE FIGURE vs. GAIN SETTING EVALUATION BOARD OVERVIEW POWER SUPPLY INTERFACE SIGNAL INPUTS AND OUTPUTS MANUAL CONTROLS Mode Switches Channel Control Switches PARALLEL INTERFACE SERIAL INTERFACE STANDARD DEVELOPMENT PLATFORM (SDP) INTERFACE EVALUATION BOARD CONTROL SOFTWARE COMMAND LINE CONTROL PROGRAM GRAPHICAL USER INTERFACE (GUI) PROGRAM EVALUATION BOARD SCHEMATICS AND LAYOUT BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE