Datasheet AD5382 (Analog Devices) - 5

AD5382 Data Sheet GENERAL DESCRIPTION
The AD5382 is a complete, single-supply, 32-channel, 14-bit MICROWIRE-, DSP-compatible serial interface with denseDAC® available in a 100-lead LQFP package. All 32 channels interface speeds in excess of 30 MHz and an I2C®-compatible have an on-chip output amplifier with rail-to-rail operation. The interface that supports a 400 kHz data transfer rate. AD5382 includes an internal software-selectable 1.25 V/2.5 V, An input register followed by a DAC register provides double 10 ppm/°C reference, an on-chip channel monitor function that buffering, al owing the DAC outputs to be updated multiplexes the analog outputs to a common MON_OUT pin independently or simultaneously using the LDAC input. for external monitoring, and an output amplifier boost mode that al ows optimization of the amplifier slew rate. Each channel has a programmable gain and offset adjust register that allows the user to fully calibrate any DAC The AD5382 contains a double-buffered paral el interface, channel. Power consumption is typically 0.25 mA per channel which features a 20 ns WR pulse width, an SPI-, QSPI-, when operating with boost mode disabled. Rev. D | Page 4 of 40 Document Outline Features Integrated Functions Applications Functional Block Diagram Table of Contents Revision History General Description Specifications AD5382-5 Specifications AD5382-3 Specifications AC Characteristics Timing Characteristics SPI-, QSPI-, MICROWIRE-, or DSP-Compatible Serial Interface I2C Serial Interface Parallel Interface Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Functional Description DAC Architecture—General Data Decoding On-Chip Special Function Registers (SFR) SFR Commands NOP (No Operation) Write Clear Code Soft Clear Soft Power-Down Soft Power-Up Soft RESET Control Register Write/Read Control Register Contents Channel Monitor Function Hardware Functions Reset Function Asynchronous Clear Function BUSY\ and LDAC\ Functions FIFO Operation in Parallel Mode Power-On Reset Power-Down AD5382 Interfaces DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces Standalone Mode Daisy-Chain Mode Readback Mode I2C Serial Interface I2C Data Transfer Start and Stop Conditions Repeated Start Conditions Acknowledge Bit (ACK) AD5382 Slave Addresses Write Operation 4-Byte Mode 3-Byte Mode 2-Byte Mode Parallel Interface CS\ Pin WR\ Pin REG0, REG1 Pins Pins A4 to A0 Pins DB13 to DB0 Microprocessor Interfacing Parallel Interface AD5382 to MC68HC11 AD5382 to PIC16C6x/7x AD5382 to 8051 AD5382 to ADSP-BF527 Applications Information Power Supply Decoupling Power Supply Sequencing Typical Configuration Circuit Monitor Function Toggle Mode Function Thermal Monitor Function AD5382 in a MEMS-Based Optical Switch Optical Attenuators Outline Dimensions Ordering Guide