Datasheet AD7880 (Analog Devices) - 4

AD7880 TIMING CHARACTERISTICS1 (VDD = +5 V
6
5%, VREF = VDD, AGND = DGND = 0 V) Limit at +25
8
C Limit at TMIN, TMAX Parameter (All Versions) (All Versions) Units Conditions/Comments
t1 50 50 ns min CONVST Pulse Width t2 130 130 ns min CONVST to BUSY Falling Edge t3 0 0 ns min BUSY to CS Setup Time t4 0 0 ns min CS to RD Setup Time t5 0 0 ns min CS to RD Hold Time t6
60 75
ns min RD Pulse Width t 2 7
57 70
ns max Data Access Time after RD t 3 8
5 5
ns min Bus Relinquish Time after RD
50 50
ns max NOTES 1Timing specifications in
bold
print are 100% production tested. All other times are sample tested at +25 °C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2t7 is measured with the load circuit of Figure 2 and defined as the time required for an output to cross 0.8 V or 2.4 V. 3t8 is derived from the measured time taken by the data outputs to change by 0.5 V when loaded with the circuit of Figure 2. The measured number is then extrapo- lated back to remove the effects of charging the 50 pF capacitor. This means that the time, t 8, quoted in the timing characteristics is the true bus relinquish time of the part and as such is independent of external bus loading capacitances.
t1 Table I. Truth Table CONVST TRACK/HOLD GOES INTO HOLD t 2 CS CONVST RD Function t CONVERT BUSY
1 1 X Not Selected 1 j 1 Start Conversion g
t3
0 1 0 Enable ADC Data 0 1 1 Data Bus Three Stated
CS t t 5 4 t ABSOLUTE MAXIMUM RATINGS* 6 RD
VDD to AGND . –0.3 V to +7 V
t8
V
t
DD to DGND . –0.3 V to +7 V
7
AGND to DGND . –0.3 V to V
THREE-STATE
DD + 0.3 V
DATA DB0 – DB11 VALID
VINA, VINB to AGND (Figure 5) . –0.3 V to VDD + 0.3 V VINA to AGND (Figure 6) . –0.6 V to 2 VDD + 0.6 V Figure 1. Timing Diagram VINA to AGND (Figure 7) . –VDD – 0.3 V to VDD + 0.3 V VREF to AGND . 0.3 V to VDD Digital Inputs to DGND . –0.3 V to VDD + 0.3 V
1.6mA
Digital Outputs to DGND . –0.3 V to VDD + 0.3 V Operating Temperature Range
TO OUTPUT
Industrial (B, C Versions) . –40°C to +85°C
+ 2.1V PIN
Storage Temperature Range . –65°C to +150°C
50pF
Lead Temperature (Soldering, 10 secs) . +300°C Power Dissipation (Any Package) to +75°C . 450 mW
200µA
Derates above +75°C by . 10 mW/°C *Stresses above those listed under “Absolute Maximum Ratings” may cause Figure 2. Load Circuit for Access and Relinquish Time permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection.
WARNING!
Although the AD7880 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
ESD SENSITIVE DEVICE
precautions are recommended to avoid performance degradation or loss of functionality. REV. 0 –3–