link to page 1 link to page 1 link to page 1 link to page 1 link to page 4 link to page 5 link to page 9 link to page 10 link to page 10 link to page 11 link to page 13 link to page 15 link to page 15 link to page 15 link to page 16 link to page 16 link to page 17 link to page 17 link to page 18 link to page 18 link to page 19 link to page 19 link to page 24 link to page 25 link to page 26 link to page 26 link to page 27 link to page 27 link to page 28 link to page 29 link to page 29 link to page 30 link to page 30 link to page 31 link to page 31 link to page 31 link to page 32 link to page 32 link to page 32 link to page 32 link to page 33 link to page 34 link to page 34 link to page 34 link to page 35 link to page 35 link to page 35 link to page 35 link to page 36 link to page 36 link to page 36 link to page 37 link to page 38 link to page 40 link to page 40 link to page 41 link to page 42 link to page 42 link to page 44 link to page 44 link to page 44 link to page 46 link to page 46 link to page 46 link to page 47 link to page 47 link to page 47 link to page 48 link to page 48 link to page 49 link to page 50 link to page 51 AD7707TABLE OF CONTENTS Features .. 1 Span and Offset Limits on the Low Level Input Channels, General Description ... 1 AIN1 and AIN2 .. 31 Functional Block Diagram .. 1 Span and Offset Limits on the High Level Input Channel AIN3 ... 31 Product Highlights ... 1 Power-Up and Calibration .. 32 Revision History ... 3 Using the AD7707 .. 33 Specifications ... 4 Clocking and Oscillator Circuit ... 33 Timing Characteristics .. 8 System Synchronization .. 33 Absolute Maximum Ratings .. 9 Reset Input .. 34 ESD Caution .. 9 Standby Mode ... 34 Pin Configuration and Function Descriptions ... 10 Accuracy .. 34 Typical Performance Characteristics ... 12 Drift Considerations .. 34 OVtput Noise .. 14 Power Supplies .. 35 Output Noise For Low Level Input Channels (5 V Operation) .. 14 Supply Current .. 35 Output Noise For Low Level Input Channels Grounding and Layout .. 35 (3 V Operation) .. 15 Digital Interface .. 36 Output Noise For High Level Input Channel AIN3 Configuring the AD7707 ... 37 (5 V Operation) .. 16 Microcomputer/Microprocessor Interfacing .. 39 Output Noise For High Level Input Channel AIN3 AD7707to68HC11 Interface .. 39 (3 V Operation) .. 17 AD7707to8XC51 Interface ... 40 On-Chip Registers .. 18 Code For Setting Up the AD7707 .. 41 Communications Register (RS2, RS1, RS0 = 0, 0, 0) ... 18 C Code for Interfacing AD7707 to 68HC11 ... 41 Calibration Sequences .. 23 Applications Information .. 43 Circuit Description ... 24 Data Acquisition ... 43 Analog Input ... 25 Smart Valve/Actuator Control .. 43 Analog Input Ranges .. 25 Pressure Measurement ... 45 Input Sample Rate .. 26 Thermocouple Measurement ... 45 Bipolar/Unipolar Inputs .. 26 RTD Measurement ... 45 Reference Input ... 27 Chart Recorders .. 46 Digital Filtering ... 28 Accommodating Various High Level Input Ranges .. 46 Filter Characteristics .. 28 Typical Input Currents ... 46 Postfiltering ... 29 Output Noise For High Level Input Channel, AIN3 ... 47 Analog Filtering .. 29 5 V Operation ... 47 Calibration ... 30 3 V Operation ... 48 Self-Calibration ... 30 Outline Dimensions ... 49 System Calibration ... 30 Ordering Guide .. 50 Rev. B | Page 2 of 52 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE OUTPUT NOISE FOR LOW LEVEL INPUT CHANNELS (5 V OPERATION) OUTPUT NOISE FOR LOW LEVEL INPUT CHANNELS (3 V OPERATION) OUTPUT NOISE FOR HIGH LEVEL INPUT CHANNEL AIN3 (5 V OPERATION) OUTPUT NOISE FOR HIGH LEVEL INPUT CHANNEL AIN3 (3 V OPERATION) ON-CHIP REGISTERS COMMUNICATIONS REGISTER (RS2, RS1, RS0 = 0, 0, 0) Setup Register (RS2, RS1, RS0 = 0, 0, 1); Power-On/Reset Status: 0x01 Clock Register (RS2, RS1, RS0 = 0, 1, 0); Power-On/Reset Status: 0x05 Data Register (RS2, RS1, RS0 = 0, 1, 1) Test Register (RS2, RS1, RS0 = 1, 0, 0); Power-On/Reset Status: 0x00 Zero-Scale Calibration Register (RS2, RS1, RS0 = 1, 1, 0); Power-On/Reset Status: 0x1F4000 Full-Scale Calibration Register (RS2, RS1, RS0 = 1, 1, 1); Power-On/Reset Status: 0x5761AB CALIBRATION SEQUENCES CIRCUIT DESCRIPTION ANALOG INPUT ANALOG INPUT RANGES INPUT SAMPLE RATE BIPOLAR/UNIPOLAR INPUTS REFERENCE INPUT DIGITAL FILTERING FILTER CHARACTERISTICS POSTFILTERING ANALOG FILTERING CALIBRATION SELF-CALIBRATION SYSTEM CALIBRATION SPAN AND OFFSET LIMITS ON THE LOW LEVEL INPUT CHANNELS, AIN1 AND AIN2 SPAN AND OFFSET LIMITS ON THE HIGH LEVEL INPUT CHANNEL AIN3 POWER-UP AND CALIBRATION USING THE AD7707 CLOCKING AND OSCILLATOR CIRCUIT SYSTEM SYNCHRONIZATION RESET INPUT STANDBY MODE ACCURACY DRIFT CONSIDERATIONS POWER SUPPLIES SUPPLY CURRENT GROUNDING AND LAYOUT DIGITAL INTERFACE CONFIGURING THE AD7707 MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7707 TO 68HC11 INTERFACE AD7707 TO 8XC51 INTERFACE CODE FOR SETTING UP THE AD7707 C CODE FOR INTERFACING AD7707 TO 68HC11 APPLICATIONS INFORMATION DATA ACQUISITION SMART VALVE/ACTUATOR CONTROL PRESSURE MEASUREMENT THERMOCOUPLE MEASUREMENT RTD MEASUREMENT CHART RECORDERS ACCOMMODATING VARIOUS HIGH LEVEL INPUT RANGES TYPICAL INPUT CURRENTS OUTPUT NOISE FOR HIGH LEVEL INPUT CHANNEL, AIN3 5 V OPERATION 3 V OPERATION OUTLINE DIMENSIONS ORDERING GUIDE