Datasheet AD7664 (Analog Devices) - 8

HerstellerAnalog Devices
Beschreibung16-Bit 570 kSPS CMOS Successive Approximation PulSAR ADC with No Missing Codes
Seiten / Seite25 / 8 — AD7664. Pin No. Mnemonic. Type. Description. DEFINITION OF …
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AD7664. Pin No. Mnemonic. Type. Description. DEFINITION OF SPECIFICATIONS. Total Harmonic Distortion (THD)

AD7664 Pin No Mnemonic Type Description DEFINITION OF SPECIFICATIONS Total Harmonic Distortion (THD)

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AD7664 Pin No. Mnemonic Type Description
35 CNVST DI Start Conversion. A falling edge on CNVST puts the internal sample-and-hold into the hold state and initiates a conversion. In Impulse Mode (IMPULSE HIGH and WARP LOW), if CNVST is held LOW when the acquisition phase (t8) is complete, the internal sample-and-hold is put into the hold state and a conversion is immediately started. 36 AGND P Must Be Tied to Analog Ground. 37 REF AI Reference Input Voltage. 38 REFGND AI Reference Input Analog Ground. 39 INGND AI Analog Input Ground. 43 IN AI Primary Analog Input with a Range of 0 V to VREF. EPAD Exposed Pad. The EPAD is connected to ground; however, this connection is not required to meet specified performance. NOTES AI = Analog Input DI = Digital Input DI/O = Bidirectional Digital DO = Digital Output P = Power
DEFINITION OF SPECIFICATIONS Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first five harmonic
Integral Nonlinearity Error (INL)
components to the rms value of a full-scale input signal and is Linearity error refers to the deviation of each individual code expressed in decibels. from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs 1/2 LSB
Signal-to-Noise Ratio (SNR)
before the first code transition. Positive full scale is defined as a SNR is the ratio of the rms value of the actual input signal to level 1 1/2 LSB beyond the last code transition. The deviation is the rms sum of all other spectral components below the Nyquist measured from the middle of each code to the true straight line. frequency, excluding harmonics and dc. The value for SNR is expressed in decibels.
Differential Nonlinearity Error (DNL)
In an ideal ADC, code transitions are 1 LSB apart. Differential
Signal to (Noise + Distortion) Ratio (S/[N+D])
nonlinearity is the maximum deviation from this ideal value. It is S/(N+D) is the ratio of the rms value of the actual input signal to often specified in terms of resolution for which no missing codes the rms sum of all other spectral components below the Nyquist are guaranteed. frequency, including harmonics but excluding dc. The value for S/(N+D) is expressed in decibels.
Full-Scale Error
The last transition (from 011 . 10 to 011 . 11 in twos
Aperture Delay
complement coding) should occur for an analog voltage 1 1/2 LSB Aperture delay is a measure of the acquisition performance and below the nominal full scale (2.49994278 V for the 0 V–2.5 V is measured from the falling edge of the CNVST input to when range). The full-scale error is the deviation of the actual level of the input signal is held for a conversion. the last transition from the ideal level.
Transient Response Unipolar Zero Error
The time required for the AD7664 to achieve its rated accuracy The first transition should occur at a level 1/2 LSB above analog after a full-scale step function is applied to its input. ground (19.073 µV for the 0 V–2.5 V range). Unipolar zero
Overvoltage Recovery
error is the deviation of the actual transition from that point. The time required for the ADC to recover to full accuracy after
Spurious-Free Dynamic Range (SFDR)
an analog input signal 150% of full-scale is reduced to 50% of The difference, in decibels (dB), between the rms amplitude of the full-scale value. the input signal and the peak spurious signal.
Effective Number of Bits (ENOB)
ENOB is a measurement of the resolution with a sine wave input. It is related to S/(N+D) by the following formula: ENOB = S N [ + D] − ( 1 7 . )6 6 0.2 dB and is expressed in bits. REV. F –7– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal to (Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Overvoltage Recovery Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS Bipolar and Wider Input Ranges Layout OUTLINE DIMENSIONS Revision History