Datasheet AD7664 (Analog Devices) - 5

AD7664 ABSOLUTE MAXIMUM RATINGS1
IN2, REF, INGND, REFGND to AGND
1.6mA IOL
. AVDD + 0.3 V to AGND – 0.3 V Ground Voltage Differences
TO OUTPUT 1.4V
AGND, DGND, OGND . ± 0.3 V
PIN CL 60pF*
Supply Voltages AVDD, DVDD, OVDD . –0.3 V to +7 V
500 I A OH
AVDD to DVDD, AVDD to OVDD . ± 7 V DVDD to OVDD . ± 7 V
*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
Digital Inputs
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
Except the Databus D(7:4) . –0.3 V to DVDD + 3.0 V Databus D(7:4) . –0.3 V to OVDD + 3.0 V Figure 1. Load Circuit for Digital Interface Timing, Internal Power Dissipation3 . 700 mW SDOUT, SYNC, SCLK Outputs, CL = 10 pF Internal Power Dissipation4 . 2.5 W Junction Temperature . 150°C Storage Temperature Range . –65°C to +150°C
2V
Lead Temperature Range
0.8V
(Soldering 10 sec) . 300°C
tDELAY tDELAY
NOTES
2V 2V
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
0.8V 0.8V
nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections Figure 2. Voltage Reference Levels for Timing of this specification is not implied. Exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. 2See Analog Input section. 3Specification is for the device in free air: 48-Lead LQFP; θJA = 91°C/W, θJC = 30°C/W. 4Specification is for device in free air: 48-Lead LFCSP; θJA = 26°C/W.
ORDERING GUIDE Temperature Model1 Range Package Description Package Option
AD7664ASTZ –40°C to +85°C 48-Lead LQFP ST-48 AD7664ASTZRL –40°C to +85°C 48-Lead LQFP ST-48 AD7664ACPZRL –40°C to +85°C 48-Lead LFCSP CP-48-4 1Z = RoHS Compliant Part.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although
WARNING!
the AD7664 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
ESD SENSITIVE DEVICE
recommended to avoid performance degradation or loss of functionality. –4– REV. F Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal to (Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Overvoltage Recovery Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS Bipolar and Wider Input Ranges Layout OUTLINE DIMENSIONS Revision History