Datasheet AD7485 (Analog Devices) - 7

AD7485 TERMINOLOGY Total Harmonic Distortion Integral Nonlinearity
Total harmonic distortion (THD) is the ratio of the rms sum This is the maximum deviation from a straight line passing of the harmonics to the fundamental. For the AD7485, it is through the endpoints of the ADC transfer function. The end- defined as: 2 2 2 2 2 points of the transfer function are zero scale, a point 1/2 LSB V2 + V3 + V4 + V5 + V THD dB 20 log ( ) = 6 below the first code transition, and full scale, a point 1/2 LSB V1 above the last code transition. where V1 is the rms amplitude of the fundamental and V2, V3,
Differential Nonlinearity
V4, V5, and V6 are the rms amplitudes of the second through This is the difference between the measured and the ideal sixth harmonics. 1 LSB change between any two adjacent codes in the ADC.
Peak Harmonic or Spurious Noise Offset Error
Peak harmonic or spurious noise is defined as the ratio of the This is the deviation of the first code transition (00 . 000) to rms value of the next largest component in the ADC output (00 . 001) from the ideal, i.e., AGND + 0.5 LSB. spectrum (up to fS/2 and excluding dc) to the rms value of the fundamental. Normally, the value of this specification is deter-
Gain Error
mined by the largest harmonic in the spectrum, but for ADCs This is the deviation of the last code transition (111 . 110) to where the harmonics are buried in the noise floor, it will be a (111 . 111) from the ideal (i.e., VREF – 1.5 LSB) after the noise peak. offset error has been adjusted out.
Intermodulation Distortion Track/Hold Acquisition Time
With inputs consisting of sine waves at two frequencies, fa and fb, Track/hold acquisition time is the time required for the output any active device with nonlinearities will create distortion products of the track/hold amplifier to reach its final value, within ±1/2 LSB, at sum and difference frequencies of mfa ± nfb where m, n = 0, 1, 2, after the end of conversion (the point at which the track/hold 3, and so on. Intermodulation distortion terms are those for which returns to track mode). neither m nor n is equal to zero. For example, the second-order
Signal to (Noise + Distortion) Ratio
terms include (fa + fb) and (fa – fb), while the third-order terms This is the measured ratio of signal to (noise + distortion) at include (2fa + fb), (2fa – fb), (fa + 2fb), and (fa – 2fb). the output of the A/D converter. The signal is the rms amplitude The AD7485 is tested using the CCIF standard where two of the fundamental. Noise is the sum of all nonfundamental input frequencies near the top end of the input bandwidth are signals up to half the sampling frequency (fS/2), excluding dc. used. In this case, the second-order terms are usually distanced The ratio is dependent on the number of quantization levels in in frequency from the original sine waves while the third-order the digitization process; the more levels, the smaller the quanti- terms are usually at a frequency close to the input frequencies. zation noise. The theoretical signal to (noise + distortion) ratio As a result, the second- and third-order terms are specified for an ideal N-bit converter with a sine wave input is given by: separately. The calculation of the intermodulation distortion Signal to (Noise + Distortion) = . 6 02 N ( + . 1 76 dB ) is as per the THD specification where it is the ratio of the rms sum of the individual distortion products to the rms amplitude Thus, for a 14-bit converter this is 86.04 dB. of the sum of the fundamentals expressed in dBs. –6– REV. A Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Integral Nonlinearity Differential Nonlinearity Offset Error Gain Error Track/Hold Acquisition Time Signal to (Noise + Distortion) Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Intermodulation Distortion Typical Performance Characteristics CIRCUIT DESCRIPTION CONVERTER OPERATION ADC TRANSFER FUNCTION POWER SAVING SERIAL INTERFACE Driving the CONVST Pin Board Layout and Grounding OUTLINE DIMENSIONS