Datasheet AD7794, AD7795 (Analog Devices) - 3

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AD7794/AD7795 SPECIFICATIONS
AVDD = 2.7 V to 5.25 V, DVDD = 2.7 V to 5.25 V, GND = 0 V, all specifications TMIN to TMAX, unless otherwise noted.
Table 1. Parameter
1
AD7794/AD7795 Unit Test Conditions/Comments CHOP ENABLED
Output Update Rate 4.17 to 470 Hz nom Settling time = 2/output update rate No Missing Codes2 AD7794 24 Bits min fADC ≤ 242 Hz AD7795 16 Bits min Resolution See the RMS Noise and Resolution Specifications section RMS Noise and Update Rates See the RMS Noise and Resolution Specifications section Integral Nonlinearity ±15 ppm of FSR max Offset Error3 ±1 μV typ Offset Error Drift vs. Temperature4 ±10 nV/°C typ Full-Scale Error3, 5 ±10 μV typ Gain Drift vs. Temperature4 ±1 ppm/°C typ Gain = 1 to 16, external reference ±3 ppm/°C typ Gain = 32 to 128, external reference Power Supply Rejection 100 dB min AIN = 1 V/gain, gain ≥ 4, external reference ANALOG INPUTS Differential Input Voltage Ranges ±VREF/gain V nom VREF = REFIN(+) − REFIN(−), or internal reference, gain = 1 to 128 Absolute AIN Voltage Limits2 Unbuffered Mode GND − 30 mV V min Gain = 1 or 2 AVDD + 30 mV V max Buffered Mode GND + 100 mV V min Gain = 1 or 2 AVDD − 100 mV V max In-Amp Active GND + 300 mV V min Gain = 4 to 128 AVDD − 1.1 V max Common-Mode Voltage, VCM 0.5 V min VCM = (AIN(+) + AIN(−))/2, gain = 4 to 128 Analog Input Current Buffered Mode or In-Amp Active Average Input Current2 AD7794B/AD7795B ±1 nA max Gain = 1 or 2, update rate < 100 Hz ±250 pA max Gain = 4 to 128, update rate < 100 Hz ±1 nA max AIN6(+)/AIN6(−) AD7794C ±3 nA max Gain = 1 or 2, update rate < 100 Hz ±2 nA max Gain = 4 to 128, update rate < 100 Hz ±3 nA max AIN6(+)/AIN6(−) Average Input Current Drift ±2 pA/°C typ Unbuffered Mode Gain = 1 or 2 Average Input Current ±400 nA/V typ Input current varies with input voltage Average Input Current Drift ±50 pA/V/°C typ Normal Mode Rejection2, 6 Internal Clock @ 50 Hz, 60 Hz 65 dB min 80 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 @ 50 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, FS[3:0] = 1001 @ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000 External Clock @ 50 Hz, 60 Hz 80 dB min 90 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 @ 50 Hz 94 dB min 100 dB typ, 50 ± 1 Hz, FS[3:0] = 1001 @ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000 Rev. D | Page 3 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RMS NOISE AND RESOLUTION SPECIFICATIONS CHOP ENABLED External Reference Internal Reference CHOP DISABLED TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 0, 0, 0 STATUS REGISTER RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80 (AD7795)/0x88 (AD7794) MODE REGISTER RS2, RS1, RS0 = 0, 0, 1; Power-On/Reset = 0x000A CONFIGURATION REGISTER RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710 DATA REGISTER RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(AD7795), 0x000000 (AD7794) ID REGISTER RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXF IO REGISTER RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000 (AD7795), 0x800000 (AD7794)) FULL-SCALE REGISTER RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7795), 0x5XXX00 (AD7794) ADC CIRCUIT INFORMATION OVERVIEW DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL INSTRUMENTATION AMPLIFIER BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS EXCITATION CURRENTS BIAS VOLTAGE GENERATOR REFERENCE REFERENCE DETECT RESET AVDD MONITOR CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION FLOWMETER OUTLINE DIMENSIONS ORDERING GUIDE