Datasheet AD7794, AD7795 (Analog Devices) - 5

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AD7794/AD7795 Parameter
1
AD7794/AD7795 Unit Test Conditions/Comments
Normal Mode Rejection2, 6 Internal Clock @ 50 Hz, 60 Hz 60 dB min 70 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 @ 50 Hz 78 dB min 90 dB typ, 50 ± 1 Hz, FS[3:0] = 1001 @ 60 Hz 86 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000 External Clock @ 50 Hz, 60 Hz 60 dB min 70 dB typ, 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 @ 50 Hz 94 dB min 100 dB typ, 50 ± 1 Hz, FS[3:0] = 1001 @ 60 Hz 90 dB min 100 dB typ, 60 ± 1 Hz, FS[3:0] = 1000 Common-Mode Rejection AD7794B/AD7795B @ DC 100 dB min AIN = 1 V/gain, with gain = 4, AMP-CM Bit = 1 @ 50 Hz, 60 Hz2 100 dB min 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 @ 50 Hz, 60 Hz2 100 dB min 50 ± 1 Hz, FS[3:0] = 1001; 60 ± 1 Hz, FS[3:0] = 1000 AD7794C @ DC 97 dB min AIN = 1 V/gain, with gain = 4, AMP-CM Bit = 1 @ 50 Hz, 60 Hz2 97 dB min 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 1010 @ 50 Hz, 60 Hz2 97 dB min 50 ± 1 Hz, FS[3:0] = 1001; 60 ± 1 Hz, FS[3:0] = 1000
CHOP ENABLED or DISABLED
REFERENCE INPUT Internal Reference Internal Reference Initial 1.17 ± 0.01% V min/max AVDD = 4 V, TA = 25°C Accuracy Internal Reference Drift2 4 ppm/°C typ 15 ppm/°C max Power Supply Rejection 85 dB typ External Reference External REFIN Voltage 2.5 V nom REFIN = REFIN(+) − REFIN(−) Reference Voltage Range2 0.1 V min AVDD V max When VREF = AVDD, the differential input must be limited to 0.9 × VREF/gain if the in-amp is active Absolute REFIN Voltage Limits2 GND − 30 mV V min AVDD + 30 mV V max Average Reference Input 400 nA/V typ Current Average Reference Input ±0.03 nA/V/°C typ Current Drift Normal Mode Rejection2 Same as for analog inputs Common-Mode Rejection 100 dB typ Reference Detect Levels 0.3 V min 0.65 V max NOXREF bit active if VREF < 0.3 V EXCITATION CURRENT SOURCES (IEXC1 and IEXC2) Output Current 10/210/1000 μA nom Initial Tolerance at 25°C ±5 % typ Drift 200 ppm/°C typ Current Matching ±0.5 % typ Matching between IEXC1 and IEXC2, VOUT = 0 V Drift Matching 50 ppm/°C typ Line Regulation (AVDD) 2 %/V typ AVDD = 5 V ± 5% Load Regulation 0.2 %/V typ Output Compliance AVDD − 0.65 V max Current sources programmed to 10 μA or 210 μA AVDD − 1.1 V max Current sources programmed to 1 mA GND − 30 mV V min Rev. D | Page 5 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RMS NOISE AND RESOLUTION SPECIFICATIONS CHOP ENABLED External Reference Internal Reference CHOP DISABLED TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 0, 0, 0 STATUS REGISTER RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80 (AD7795)/0x88 (AD7794) MODE REGISTER RS2, RS1, RS0 = 0, 0, 1; Power-On/Reset = 0x000A CONFIGURATION REGISTER RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710 DATA REGISTER RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(AD7795), 0x000000 (AD7794) ID REGISTER RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXF IO REGISTER RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000 (AD7795), 0x800000 (AD7794)) FULL-SCALE REGISTER RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7795), 0x5XXX00 (AD7794) ADC CIRCUIT INFORMATION OVERVIEW DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL INSTRUMENTATION AMPLIFIER BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS EXCITATION CURRENTS BIAS VOLTAGE GENERATOR REFERENCE REFERENCE DETECT RESET AVDD MONITOR CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION FLOWMETER OUTLINE DIMENSIONS ORDERING GUIDE