Datasheet AD7610 (Analog Devices) - 2

AD7610* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS REFERENCE MATERIALS
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Product Selection Guide
• SAR ADC & Driver Quick-Match Guide
EVALUATION KITS Technical Articles
• AD7610 Evaluation Kit • MS-1779: Nine Often Overlooked ADC Specifications • MS-2210: Designing Power Supplies for High Speed ADC
DOCUMENTATION Tutorials Application Notes
• MT-002: What the Nyquist Criterion Means to Your • AN-1141: Powering a Dual Supply Precision ADC with Sampled Data System Design Switching Regulators • MT-031: Grounding Data Converters and Solving the • AN-742: Frequency Domain Response of Switched- Mystery of "AGND" and "DGND" Capacitor ADCs • AN-931: Understanding PulSAR ADC Support Circuitry
DESIGN RESOURCES
• AN-932: Power Supply Sequencing • AD7610 Material Declaration
Data Sheet
• PCN-PDN Information • AD7610: 16-Bit, 250 kSPS, Unipolar/Bipolar Programmable • Quality And Reliability Input PulSAR® ADC Data Sheet • Symbols and Footprints
Technical Books
• The Data Conversion Handbook, 2005
DISCUSSIONS
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Document Outline Features Functional Block Diagram Applications General Description Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview Converter Operation Transfer Functions Typical Connection Diagram Analog Inputs Input Range Selection Input Structure Voltage Reference Input/Output Internal Reference (REF = 5 V) (PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V) (PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor Power Supplies Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down Conversion Control Interfaces Digital Interface RESET Parallel Interface Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) Serial Interface Data Interface Master Serial Interface Internal Clock (SER/ = High, EXT/ = Low) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) Read During Convert (RDC = High) Slave Serial Interface External Clock (SER/ = High, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion Hardware Configuration Software Configuration Microprocessor Interfacing SPI Interface Application Information Layout Guidelines Evaluating Performance Outline Dimensions Ordering Guide