Datasheet LTC2433-1 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungDifferential Input 16-Bit No Latency Delta Sigma ADC
Seiten / Seite28 / 9 — APPLICATIO S I FOR ATIO. Input Voltage Range. Power-Up Sequence. …
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APPLICATIO S I FOR ATIO. Input Voltage Range. Power-Up Sequence. Reference Voltage Range. Output Data Format

APPLICATIO S I FOR ATIO Input Voltage Range Power-Up Sequence Reference Voltage Range Output Data Format

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LTC2433-1
U U W U APPLICATIO S I FOR ATIO
The LTC2433-1 performs offset and full-scale calibrations remains constant at 1.45µV RMS (or 8.7µVP-P), while the every conversion cycle. This calibration is transparent to quantization is reduced to 1.5µV per LSB. As a result, the user and has no effect on the cyclic operation de- lowering the reference improves the effective resolution scribed above. The advantage of continuous calibration is for low level input voltages. extreme stability of offset and full-scale readings with re- spect to time, supply voltage change and temperature drift.
Input Voltage Range
The analog input is truly differential with an absolute/
Power-Up Sequence
common mode range for the IN+ and IN– input pins The LTC2433-1 automatically enters an internal reset state extending from GND – 0.3V to VCC + 0.3V. Outside these when the power supply voltage VCC drops below approxi- limits, the ESD protection devices begin to turn on and the mately 2V. This feature guarantees the integrity of the errors due to input leakage current increase rapidly. Within conversion result and of the serial interface mode selec- these limits, the LTC2433-1 converts the bipolar differen- tion. (See the 2-wire I/O sections in the Serial Interface tial input signal, VIN = IN+ – IN–, from – FS = – 0.5 • VREF to Timing Modes section.) +FS = 0.5 • VREF where VREF = REF+ – REF–. Outside this range, the converter indicates the overrange or the When the VCC voltage rises above this critical threshold, underrange condition using distinct output codes. the converter creates an internal power-on-reset (POR) signal with a typical duration of 1ms. The POR signal clears Input signals applied to the analog input pins may extend all internal registers. Following the POR signal, the by 300mV below ground and above VCC. In order to limit LTC2433-1 starts a normal conversion cycle and follows any fault current, resistors of up to 5k may be added in the succession of states described above. The first con- series with the pins without affecting the performance of version result following POR is accurate within the speci- the device. In the physical layout, it is important to main- fications of the device if the power supply voltage is restored tain the parasitic capacitance of the connection between within the operating range (2.7V to 5.5V) before the end of these series resistors and the corresponding pins as low the POR time interval. as possible; therefore, the resistors should be located as close as practical to the pins. The effect of the series
Reference Voltage Range
resistance on the converter accuracy can be evaluated This converter accepts a truly differential external refer- from the curves presented in the Input Current/Reference ence voltage. The absolute/common mode voltage speci- Current sections. In addition, series resistors will intro- fication for the REF+ and REF– pins covers the entire range duce a temperature dependent offset error due to the input from GND to V leakage current. A 10nA input leakage current will develop CC. For correct converter operation, the REF+ pin must always be more positive than the REF– pin. a 1LSB offset error on an 8k resistor if VREF = 5V. This error has a very strong temperature dependency. The LTC2433-1 can accept a differential reference voltage from 0.1V to VCC. The converter output noise is deter-
Output Data Format
mined by the thermal noise of the front-end circuits, and The LTC2433-1 serial output data stream is 19 bits long. as such, its value in microvolts is nearly constant with The first 3 bits represent status information indicating the reference voltage. A decrease in reference voltage will conversion state and sign. The next 16 bits are the conver- significantly improve the converter’s effective resolution, sion result, MSB first. The third and fourth bit together are since the thermal noise (1.45µV) is well below the quan- also used to indicate an underrange condition (the differ- tization level of the device (75.6µV for a 5V reference). At ential input voltage is below –FS) or an overrange condi- the minimum reference (100mV) the thermal noise tion (the differential input voltage is above +FS). 24331fa 9