Datasheet LTC2351-14 (Analog Devices)

HerstellerAnalog Devices
Beschreibung6 Channel, 14-Bit, 1.5Msps Simultaneous Sampling ADC with Shutdown
Seiten / Seite20 / 1 — FEATURES. DESCRIPTION. 1.5Msps ADC with Six Simultaneously Sampled. …
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FEATURES. DESCRIPTION. 1.5Msps ADC with Six Simultaneously Sampled. Differential Inputs. 250ksps Throughput per Channel

Datasheet LTC2351-14 Analog Devices

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LTC2351-14 6-Channel, 14-Bit, 1.5Msps Simultaneous Sampling ADC with Shutdown
FEATURES DESCRIPTION
n
1.5Msps ADC with Six Simultaneously Sampled
The LTC®2351-14 is a 14-bit, 1.5Msps ADC with six simul-
Differential Inputs
taneously sampled differential inputs. The device draws n
250ksps Throughput per Channel
only 5.5mA from a single 3V supply, and comes in a tiny n
75dB SINAD
32-pin (5mm × 5mm) QFN package. A sleep shutdown n
Low Power Dissipation: 16.5mW
mode further reduces power consumption to 12μW. The n
3V Single Supply Operation
combination of low power and tiny package makes the n 2.5V Internal Bandgap Reference, Can Be Overdriven LTC2351-14 suitable for portable applications. with External Reference The LTC2351-14 contains six separate differential inputs n 3-Wire SPI-Compatible Serial Interface that are sampled simultaneously on the rising edge of the n Internal Conversion Triggered by CONV CONV signal. These six sampled inputs are then converted n Sleep (12μW) Shutdown Mode at a rate of 250ksps per channel. n NAP (4.5mW) Shutdown Mode n The 83dB common mode rejection allows users to eliminate 0V to 2.5V Unipolar, or ±1.25V Bipolar Differential ground loops and common mode noise by measuring Input Range n signals differentially from the source. 83dB Common Mode Rejection n Tiny 32-Pin (5mm × 5mm) QFN Package The device converts 0V to 2.5V unipolar inputs differentially,
APPLICATIONS
or ±1.25V bipolar inputs also differentially, depending on the state of the BIP pin. Any analog input may swing rail-to-rail n as long as the differential input range is maintained. Multiphase Power Measurement n Multiphase Motor Control The conversion sequence can be abbreviated to convert n Data Acquisition Systems fewer than six channels, depending on the logic state of n Uninterruptable Power Supplies the SEL2, SEL1 and SEL0 inputs. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, The serial interface sends out the six conversion results in 96 including 6084440, 6522187. clocks for compatibility with standard serial interfaces.
BLOCK DIAGRAM
10μF 3V CH4– CH4+ CH5– CH5+ CH2– CH2+ CH3– CH3+ CH0– CH0+ CH1– CH1+ VCC VDD 21 20 19 18 17 16 15 14 12 11 10 9 8 7 6 5 4 24 25 13 OVDD + + + + + + 14-BIT LATCH 0 – 3V – – – – – 3 14-BIT LATCH 1 THREE- S AND H S AND H S AND H S AND H S AND H S AND H STATE 1.5Msps 14-BIT LATCH 2 SD0 SERIAL 1 14-BIT ADC 14-BIT LATCH 3 OUTPUT 0.1μF 14-BIT LATCH 4 PORT OGND 2 14-BIT LATCH 5 MUX CONV TIMING 30 2.5V LOGIC REFERENCE SCK 32 DGND 31 33 22 23 29 26 27 28 10μF 235114 TA01 GND VREF BIP SEL2 SEL1 SEL0 235114fb 1