Datasheet LTC2159 (Analog Devices) - 4

HerstellerAnalog Devices
Beschreibung16-Bit, 20Msps Low Power ADC
Seiten / Seite32 / 4 — converTer characTerisTics. The. denotes the specifications which apply …
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DokumentenspracheEnglisch

converTer characTerisTics. The. denotes the specifications which apply over the full operating

converTer characTerisTics The denotes the specifications which apply over the full operating

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LTC2159
converTer characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) l 16 Bits Integral Linearity Error Differential Analog Input (Note 6) l –6 ±2 6 LSB Differential Linearity Error Differential Analog Input l –0.9 ±0.5 0.9 LSB Offset Error (Note 7) l –7 ±1.5 7 mV Gain Error Internal Reference ±1.5 %FS External Reference l –1.8 –0.5 0.8 %FS Offset Drift ±10 µV/°C Full-Scale Drift Internal Reference ±30 ppm/°C External Reference ±10 ppm/°C Transition Noise External Reference 3.2 LSBRMS
analog inpuT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP-P V + – IN(CM) Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l 0.7 VCM 1.25 V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 20Msps 32 µA I + – IN1 Analog Input Leakage Current (No Encode) 0 < AIN , AIN < VDD l –1 1 µA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 µA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –3 3 µA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter Single-Ended Encode 0.07 psRMS Differential Encode 0.09 CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full Power Bandwidth Figure 6 Test Circuit 550 MHz
DynaMic accuracy The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio 5MHz Input 77.1 dBFS 30MHz Input l 75.5 77.0 dBFS 70MHz Input 76.9 dBFS 140MHz Input 76.4 dBFS SFDR Spurious Free Dynamic Range 5MHz Input 90 dBFS 2nd Harmonic 30MHz Input l 84 90 dBFS 70MHz Input 89 dBFS 140MHz Input 84 dBFS SFDR Spurious Free Dynamic Range 5MHz Input 90 dBFS 3rd Harmonic 30MHz Input l 84 90 dBFS 70MHz Input 89 dBFS 140MHz Input 84 dBFS 2159f 4 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Electrical Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts