Datasheet LTC1412 (Analog Devices) - 6

HerstellerAnalog Devices
Beschreibung12-Bit, 3Msps, Sampling A/D Converter
Seiten / Seite16 / 6 — TYPICAL PERFOR A CE CHARACTERISTICS. Power Supply Feedthrough. Input …
Dateiformat / GrößePDF / 347 Kb
DokumentenspracheEnglisch

TYPICAL PERFOR A CE CHARACTERISTICS. Power Supply Feedthrough. Input Common Mode Rejection. vs Ripple Frequency

TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Feedthrough Input Common Mode Rejection vs Ripple Frequency

Modelllinie für dieses Datenblatt

Textversion des Dokuments

LTC1412
W U TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Feedthrough Input Common Mode Rejection vs Ripple Frequency vs Input Frequency
0 80 70 – 20 60 – 40 50 – 60 40 VSS 30 – 80 VDD DGND 20 –100 COMMON MODE REJECTION (dB) 10 –120 0 AMPLITUDE OF POWER SUPPLY FEEDTHROUGH (dB) 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M RIPPLE FREQUENCY (Hz) INPUT FREQUENCY (Hz) 1412 G08 1412 G09
U U U PIN FUNCTIONS A + IN (Pin 1):
Positive Analog Input. ±2.5V input range
OVDD (Pin 21):
Positive Supply for the Output Drivers. Tie when A – – IN is grounded. ±2.5V differential if AIN is to Pin 28 when driving 5V logic. Tie to 3V when driving driven. 3V logic.
A – IN (Pin 2):
Negative Analog Input. Can be grounded or
OGND (Pin 22):
Digital Ground for the Output Drivers. driven differentially with A + IN .
CONVST (Pin 23):
Conversion Start Signal. This active low
VREF (Pin 3):
2.5V Reference Output. signal starts a conversion on its falling edge.
REFCOMP (Pin 4):
4.06V Reference Bypass Pin.
CS (Pin 24):
Chip Select. This input must be low for the Bypass to AGND with 10µF ceramic (or 10µF tantalum in ADC to recognize the CONVST inputs. parallel with 0.1µF ceramic).
BUSY (Pin 25):
The BUSY Output Shows the Converter
AGND (Pin 5):
Analog Ground. Status. It is low when a conversion is in progress.
D11 to D4 (Pins 6 to 13):
Three-State Data Outputs.
VSS (Pin 26):
– 5V Negative Supply. Bypass to AGND with 10µF ceramic (or 10µF tantalum in parallel with 0.1µF
DGND (Pin 14):
Digital Ground for Internal Logic. ceramic).
D3 to D0 (Pins 15 to 18):
Three-State Data Outputs.
DVDD (Pin 27):
5V Positive Supply. Tie to Pin 28.
DGND (Pin 19):
Digital Ground for Internal Logic.
AVDD (Pin 28):
5V Positive Supply. Bypass to AGND with
DVDD (Pin 20):
5V Positive Supply. Tie to Pin 28. Bypass 10µF ceramic (or 10µF tantalum in parallel with 0.1µF to AGND with 0.1µF ceramic. ceramic). 6