Datasheet LTC1286, LTC1298 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | Micropower Sampling 12-Bit A/D Converters In S0-8 Packages |
| Seiten / Seite | 24 / 7 — TYPICAL PERFORMANCE CHARACTERISTICS. Minimum Clock Frequency. Digital … |
| Dateiformat / Größe | PDF / 299 Kb |
| Dokumentensprache | Englisch |
TYPICAL PERFORMANCE CHARACTERISTICS. Minimum Clock Frequency. Digital Input Logic Threshold. Input Channel Leakage Current
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LTC1286/LTC1298
W U TYPICAL PERFORMANCE CHARACTERISTICS Minimum Clock Frequency Digital Input Logic Threshold Input Channel Leakage Current for 0.1 LSB Error vs Temperature vs Supply Voltage vs Temperature
200 3 1000 VCC = VREF = 5V TA = 25°C VCC = 5V VREF = 5V 100 150 10 100 2 ON CHANNEL 1 CLOCK FREQUENCY (kHz) 50 LEAKAGE CURRENT (nA) OFF CHANNEL 0.1 DIGITAL LOGIC THRESHOLD VOLTAGE (V) 0 1 0.01 –55 –35 –15 5 25 45 65 85 3 4 5 6 7 8 9 – 60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) LT1286/98 • G14 LTC 1286/98 G17 1196/98 G19
U U U PIN FUNCTIONS LTC1286 LTC1298 VREF (Pin 1):
Reference Input. The reference input defines
CS/SHDN (Pin 1):
Chip Select Input. A logic low on this the span of the A/D converter. input enables the LTC1298. A logic high on this input disables and powers down the LTC1298.
IN+ (Pin 2):
Positive Analog Input.
CH0 (Pin 2):
Analog Input.
IN – (Pin 3):
Negative Analog Input.
CH1 (Pin 3):
Analog Input.
GND (Pin 4):
Analog Ground. GND should be tied directly to an analog ground plane.
GND (Pin 4):
Analog Ground. GND should be tied directly to an analog ground plane.
CS/SHDN (Pin 5):
Chip Select Input. A logic low on this input enables the LTC1286. A logic high on this input
DIN (Pin 5):
Digital Data Input. The multiplexer address is disables and powers down the LTC1286. shifted into this input.
DOUT (Pin 6):
Digital Data Output. The A/D conversion
DOUT (Pin 6):
Digital Data Output. The A/D conversion result is shifted out of this output. result is shifted out of this output.
CLK (Pin 7):
Shift Clock. This clock synchronizes the serial
CLK (Pin 7):
Shift Clock. This clock synchronizes the data transfer and determines conversion speed. serial data transfer and determines conversion speed.
VCC (Pin 8):
Power Supply Voltage. This pin provides
VCC/VREF (Pin 8):
Power Supply and Reference Voltage. power to the A/D converter. It must be kept free of noise This pin provides power and defines the span of the A/D and ripple by bypassing directly to the analog ground converter. It must be kept free of noise and ripple by plane. bypassing directly to the analog ground plane. 7
W U TYPICAL PERFORMANCE CHARACTERISTICS Minimum Clock Frequency Digital Input Logic Threshold Input Channel Leakage Current for 0.1 LSB Error vs Temperature vs Supply Voltage vs Temperature
200 3 1000 VCC = VREF = 5V TA = 25°C VCC = 5V VREF = 5V 100 150 10 100 2 ON CHANNEL 1 CLOCK FREQUENCY (kHz) 50 LEAKAGE CURRENT (nA) OFF CHANNEL 0.1 DIGITAL LOGIC THRESHOLD VOLTAGE (V) 0 1 0.01 –55 –35 –15 5 25 45 65 85 3 4 5 6 7 8 9 – 60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C) LT1286/98 • G14 LTC 1286/98 G17 1196/98 G19
U U U PIN FUNCTIONS LTC1286 LTC1298 VREF (Pin 1):
Reference Input. The reference input defines
CS/SHDN (Pin 1):
Chip Select Input. A logic low on this the span of the A/D converter. input enables the LTC1298. A logic high on this input disables and powers down the LTC1298.
IN+ (Pin 2):
Positive Analog Input.
CH0 (Pin 2):
Analog Input.
IN – (Pin 3):
Negative Analog Input.
CH1 (Pin 3):
Analog Input.
GND (Pin 4):
Analog Ground. GND should be tied directly to an analog ground plane.
GND (Pin 4):
Analog Ground. GND should be tied directly to an analog ground plane.
CS/SHDN (Pin 5):
Chip Select Input. A logic low on this input enables the LTC1286. A logic high on this input
DIN (Pin 5):
Digital Data Input. The multiplexer address is disables and powers down the LTC1286. shifted into this input.
DOUT (Pin 6):
Digital Data Output. The A/D conversion
DOUT (Pin 6):
Digital Data Output. The A/D conversion result is shifted out of this output. result is shifted out of this output.
CLK (Pin 7):
Shift Clock. This clock synchronizes the serial
CLK (Pin 7):
Shift Clock. This clock synchronizes the data transfer and determines conversion speed. serial data transfer and determines conversion speed.
VCC (Pin 8):
Power Supply Voltage. This pin provides
VCC/VREF (Pin 8):
Power Supply and Reference Voltage. power to the A/D converter. It must be kept free of noise This pin provides power and defines the span of the A/D and ripple by bypassing directly to the analog ground converter. It must be kept free of noise and ripple by plane. bypassing directly to the analog ground plane. 7