Datasheet MCP6231, MCP6231R, MCP6231U, MCP6232, MCP62314 (Microchip) - 7

MCP6231/1R/1U/2/4 Note:
Unless otherwise indicated, T ≈ A = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, RL = 100 kΩ to VDD/2 and CL = 60 pF.
0.30 G = +1 V/V VDD = 5.5V ) RL = 10 kΩ 0.25 ) Falling Edge s mV/div 0.20 (V/µ te e (10 g Ra 0.15 w lta o Sle V 0.10 Rising Edge VDD = 1.8V 0.05 Output -50 -25 0 25 50 75 100 125 Ambient Temperature (°C) Time (2 µs/div) FIGURE 2-13:
Slew Rate vs. Ambient
FIGURE 2-16:
Small-Signal, Non-Inverting Temperature. Pulse Response.
1,000 5.0 4.5 VDD = 5.0V G = +1 V/V 4.0 ) adroom 100 V V 3.5 DD – VOH e ( e He ) V 3.0 ag ag (m VOL – VSS 2.5 Volt 10 Volt 2.0 1.5 Output 1.0 Output 1 0.5 1.E- 1002 µ 1.E 10-01 0µ 1.E+00 1m 1.E+ 10 01 m 0.0 Output Current Magnitude (A) Time (20 µs/div) FIGURE 2-14:
Output Voltage Headroom
FIGURE 2-17:
Large-Signal, Non-Inverting vs. Output Current Magnitude. Pulse Response.
10 30 VCM = 0.9VDD 25 VDD = 5.5V Swing rent 20 ) Cur VDD = 1.8V 15 P-P 1 ent TA = +125°C (V sc T 10 A = +85°C ie u TA = +25°C Q per Amplifier (µA) . Output Voltage 5 TA = -40°C Max 0 0.1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1.E+03 1k 1.E+0 10k 4 1.E 1 +05 00k 1.E+ 1 0 M 6 Frequency (Hz) Power Supply Voltage (V) FIGURE 2-15:
Maximum Output Voltage
FIGURE 2-18:
Quiescent Current vs. Swing vs. Frequency. Power Supply Voltage. © 2009 Microchip Technology Inc. DS21881E-page 7 Document Outline 1.0 Electrical Characteristics 1.1 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-2: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: PSRR, CMRR vs. Frequency. FIGURE 2-3: Input Bias Current at +85°C. FIGURE 2-4: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-5: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-6: Input Bias Current at +125°C. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.8V. FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. FIGURE 2-10: Input Offset Voltage Drift. FIGURE 2-11: Input Offset Voltage vs. Output Voltage. FIGURE 2-12: Output Short-Circuit Current vs. Ambient Temperature. FIGURE 2-13: Slew Rate vs. Ambient Temperature. FIGURE 2-14: Output Voltage Headroom vs. Output Current Magnitude. FIGURE 2-15: Maximum Output Voltage Swing vs. Frequency. FIGURE 2-16: Small-Signal, Non-Inverting Pulse Response. FIGURE 2-17: Large-Signal, Non-Inverting Pulse Response. FIGURE 2-18: Quiescent Current vs. Power Supply Voltage. FIGURE 2-19: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-20: The MCP6231/1R/1U/2/4 Show No Phase Reversal. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table for Single Op Amps TABLE 3-2: Pin Function Table for Dual and Quad Op Amps 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply (VSS and VDD) 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Rail-to-Rail Inputs FIGURE 4-1: The MCP6231/1R/1U/2/4 Show No Phase Reversal. FIGURE 4-2: Simplified Analog Input ESD Structures. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output resistor, RISO stabilizes large capacitive loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: Summing Amplifier Circuit. FIGURE 4-9: Effect of Parasitic Capacitance at the Input. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information