Datasheet LTC6702 (Analog Devices) - 7

LTC6702
APPLICATIONS INFORMATION
The LTC6702 device is a fast (500ns delay), low power,
Input Protection
low voltage (1.7V to 5.5V supply) general purpose dual External input protection circuitry is only needed if currents comparator. It provides rail-to-rail outputs able to interface would otherwise exceed the absolute maximum rating. to TTL/CMOS, draws low supply currents (30μA/compara- Inputs driven further negative than 100mV below ground tor), and has internal hysteresis (approximately 4mV). will not cause damage provided the current is limited to 10mA. ESD protection diodes are provided to prevent
Hysteresis
damage during handling. Each comparator has built-in hysteresis to simplify designs, to insure stable operation in the presence of noise at the
Comparator Input
inputs, and to reject supply rail noise. The reference voltage The allowable input voltage ranges from 100mV below GND applied to the input is not the exact switching threshold to within 1.2V of the positive supply. The input may be value due to the built-in hysteresis. Actual output switching forced below ground without causing an improper output, typically occurs within ±2.2mV of the reference voltage, though some additional input current will begin to fl ow plus or minus the input offset voltage. External positive from the ESD input protection diode. The inputs can reach feedback circuitry can be employed to increase effective up to 6V independent of the V+ supply voltage without hysteresis if desired, as shown in Figure 1. This circuitry causing additional input current or damage to the part. will provide an apparent effect on both the rising and fall- As long as one input is within the allowable input voltage ing input thresholds (the actual internal trip points remain range, the LTC6702 will continue to function normally. unaffected). If an inverting confi guration with hysteresis is needed, simply swap the VIN and VREF connections.
Comparator Output Unused Inputs
The comparator output is a push-pull CMOS stage guaranteed to swing to within 350mV of V+ and 250mV Any unused inputs should be connected in a way that fi xes of ground, over temperature when sourcing or sinking the output logic state high or low. One easy way to do this 15mA. No external pull-up/down resistor is required. To is to tie +IN to V+ and –IN to GND. R1 Additional Hystersis = • V+ R3 Trip Voltages: ⎛ 1 1 1 ⎞ V = V • R1 • + + IN(L→ ) H REF ⎝⎜ R1 R2 R3⎠⎟ R3 ⎛ 1 1 1 ⎞ ⎛ R1⎞ V = V • R1 • + + • V+ IN(H L → ) RE EF R1 ⎝⎜ R1 R2 R3⎠⎟ − ⎝⎜ R3⎠⎟ VIN + 1/2 LTC6702 Example: Additional Hysteresis = mV, V+ 50 = 5V R R2 VREF – = 1 1 k 0 R2 = 249k R3 6702 F01 = 1M FOR V . : ( ) . REF = 0 5V V L IN →H = 0 525V V (H H→L)= . 0 475V IN
Figure 1. Additional Hysteresis Circuit for Noninverting Confi guration
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