Datasheet ADA4941-1 (Analog Devices) - 7

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ADA4941-1 Data Sheet ABSOLUTE MAXIMUM RATINGS
quiescent current (I
Table 4.
S). The power dissipated due to the load drive depends upon the particular application. For each output,
Parameter Rating
the power due to load drive is calculated by multiplying the load Supply Voltage 12 V current by the associated voltage drop across the device. The Power Dissipation See Figure 3 power dissipated due to al of the loads is equal to the sum of Storage Temperature Range −65°C to +125°C the power dissipation due to each individual load. RMS voltages Operating Temperature Range −40°C to +85°C and currents must be used in these calculations. Lead Temperature (Soldering 10 sec) 300°C Junction Temperature 150°C Airflow increases heat dissipation, effectively reducing θJA. In Stresses at or above those listed under Absolute Maximum addition, more metal directly in contact with the package leads Ratings may cause permanent damage to the product. This is a from metal traces, through holes, ground, and power planes stress rating only; functional operation of the product at these reduces the θJA. The exposed paddle on the underside of the or any other conditions above those indicated in the operational package must be soldered to a pad on the PCB surface that is section of this specification is not implied. Operation beyond thermal y connected to a copper plane to achieve the specified θJA. the maximum operating conditions for extended periods may Figure 3 shows the maximum safe power dissipation in the affect product reliability. packages vs. the ambient temperature for the 8-lead SOIC
THERMAL RESISTANCE
(126°C/W) and for the 8-lead LFCSP (83°C/W) on a JEDEC standard 4-layer board. The LFCSP must have its underside θJA is specified for the worst-case conditions, that is, θJA is paddle soldered to a pad that is thermal y connected to a PCB specified for a device soldered in the circuit board with its plane. θJA values are approximations. exposed paddle soldered to a pad (if applicable) on the PCB surface that is thermal y connected to a copper plane, with zero
2.5
airflow.
) (W 2.0 N Table 5. Thermal Resistance IO T Package Type θ PA LFCSP JA θJC Unit 1.5 ISSI
8-Lead SOIC on 4-Layer Board 126 28 °C/W
D
8-Lead LFCSP with EP on 4-Layer Board 83 19 °C/W
ER W 1.0 MAXIMUM POWER DISSIPATION SOIC M PO MU
The maximum safe power dissipation in the ADA4941-1
XI 0.5 MA
package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass
0
transition temperature, the plastic changes its properties. Even
–40 –20 0 20 40 60 80 100 120
002 temporarily exceeding this temperature limit can change the
AMBIENT TEMPERATURE (°C)
05704- stresses that the package exerts on the die, permanently shifting Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board the parametric performance of the ADA4941-1. Exceeding a
ESD CAUTION
junction temperature of 150°C for an extended period can result in changes in the silicon devices potential y causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for al outputs. The quiescent power is the voltage between the supply pins (V S) times the Rev. D | Page 6 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC OPERATION DC ERROR CALCULATIONS OUTPUT VOLTAGE NOISE FREQUENCY RESPONSE VS. CLOSED-LOOP GAIN APPLICATIONS INFORMATION OVERVIEW USING THE REF PIN INTERNAL FEEDBACK NETWORK POWER DISSIPATION DISABLE FEATURE ADDING A 3-POLE, SALLEN-KEY FILTER DRIVING THE AD7687 ADC GAIN OF −2 CONFIGURATION OUTLINE DIMENSIONS ORDERING GUIDE