Datasheet LM556 (Texas Instruments)
| Hersteller | Texas Instruments |
| Beschreibung | Dual Timer |
| Seiten / Seite | 20 / 1 — LM556. LM556 Dual Timer. 1 Features. 3 Description. Device … |
| Revision | A |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
LM556. LM556 Dual Timer. 1 Features. 3 Description. Device Information(1). PART NUMBER. PACKAGE. BODY SIZE (NOM). 2 Applications
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LM556
SNAS549A – MARCH 2000 – REVISED OCTOBER 2015
LM556 Dual Timer 1 Features 3 Description
The LM556 dual-timing circuit is a highly-stable • Direct Replacement for SE556/NE556 1 controller capable of producing accurate time delays • Timing From Microseconds Through Hours or oscillation. The LM556 device is a dual-timing • Operates in Both Astable and Monostable Modes version of the LM555 device. Timing is provided by • Replaces Two 555 Timers an external resistor and capacitor for each timing function. The two timers operate independently of • Adjustable Duty Cycle each other, sharing only VCC and ground. The circuits • Output Can Source or Sink 200 mA may be triggered and reset on falling waveforms. The • Output and Supply TTL-Compatible output structures may sink or source 200 mA. • Temperature Stability Better Than 0.005% per °C
Device Information(1)
• Normally On and Normally Off Output
PART NUMBER PACKAGE BODY SIZE (NOM)
SOIC (14) 3.91 mm × 8.65 mm
2 Applications
LM556 PDIP (14) 6.35 mm × 19.177 mm • Precision Timing (1) For all available packages, see the orderable addendum at • Pulse Generation the end of the data sheet. • Sequential Timing • Time Delay Generation • Pulse Width Modulation • Pulse Position Modulation • Linear Ramp Generator
Schematic Diagram
1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Operating Characteristics 7.3.2 Timing from Microseconds Through Hours 7.4 Device Functional Modes 7.4.1 Monostable Mode 7.4.2 Astable (Free-Running) Mode 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.3 Application Curve 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Community Resources 11.3 Trademarks 11.4 Electrostatic Discharge Caution 11.5 Glossary 12 Mechanical, Packaging, and Orderable Information
LM556
SNAS549A – MARCH 2000 – REVISED OCTOBER 2015
LM556 Dual Timer 1 Features 3 Description
The LM556 dual-timing circuit is a highly-stable • Direct Replacement for SE556/NE556 1 controller capable of producing accurate time delays • Timing From Microseconds Through Hours or oscillation. The LM556 device is a dual-timing • Operates in Both Astable and Monostable Modes version of the LM555 device. Timing is provided by • Replaces Two 555 Timers an external resistor and capacitor for each timing function. The two timers operate independently of • Adjustable Duty Cycle each other, sharing only VCC and ground. The circuits • Output Can Source or Sink 200 mA may be triggered and reset on falling waveforms. The • Output and Supply TTL-Compatible output structures may sink or source 200 mA. • Temperature Stability Better Than 0.005% per °C
Device Information(1)
• Normally On and Normally Off Output
PART NUMBER PACKAGE BODY SIZE (NOM)
SOIC (14) 3.91 mm × 8.65 mm
2 Applications
LM556 PDIP (14) 6.35 mm × 19.177 mm • Precision Timing (1) For all available packages, see the orderable addendum at • Pulse Generation the end of the data sheet. • Sequential Timing • Time Delay Generation • Pulse Width Modulation • Pulse Position Modulation • Linear Ramp Generator
Schematic Diagram
1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 ESD Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Typical Characteristics 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Operating Characteristics 7.3.2 Timing from Microseconds Through Hours 7.4 Device Functional Modes 7.4.1 Monostable Mode 7.4.2 Astable (Free-Running) Mode 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.3 Application Curve 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Community Resources 11.3 Trademarks 11.4 Electrostatic Discharge Caution 11.5 Glossary 12 Mechanical, Packaging, and Orderable Information