Datasheet Texas Instruments LMC7211 (Texas Instruments) - 2
Hersteller | Texas Instruments |
Beschreibung | Tiny CMOS Comparator with Rail-to-Rail Input and Push-Pull Output |
Seiten / Seite | 24 / 2 — LMC7211-N. www.ti.com. Absolute Maximum Ratings (1). Operating Ratings … |
Revision | F |
Dateiformat / Größe | PDF / 1.3 Mb |
Dokumentensprache | Englisch |
LMC7211-N. www.ti.com. Absolute Maximum Ratings (1). Operating Ratings (1). 2.7V Electrical Characteristics. Boldface. Symbol
Textversion des Dokuments
LMC7211-N
SNOS746F – MAY 2004 – REVISED JANUARY 2013
www.ti.com Absolute Maximum Ratings (1)
ESD Tolerance (2) 2 kV Differential Input Voltage (VCC) +0.3V to (−VCC)−0.3V Voltage at Input/Output Pin (VCC) + 0.3V to (−VCC)−0.3V Supply Voltage (V+–V−) 16V Current at Input Pin (3) ±5 mA Current at Output Pin(4) (5) ±30 mA Current at Power Supply Pin 40 mA Lead Temperature (soldering, 10 sec) 260°C Storage Temperature Range −65°C to +150°C Junction Temperature(6) 150°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. (2) Human body model, 1.5 kΩ in series with 100 pF. (3) Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage rating. (4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely affect reliability. (5) Do not short circuit output to V+, when V+ is greater than 12V or reliability will be adversely affected. (6) The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) − TA)/θJA.All numbers apply for packages soldered directly into a PC board.
Operating Ratings (1)
Supply Voltage 2.7 ≤ VCC ≤ 15V Junction Temperature Range LMC7211AI, LMC7211BI −40°C ≤ TJ ≤ +85°C Thermal Resistance (θJA) SO-8 Package, 8-Pin Surface Mount 180°C/W M05A Package, 5-Pin Surface Mount 325°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
2.7V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = VO = V+/2.
Boldface
limits apply at the temperature extremes.
Symbol Parameter Conditions LMC7211AI LMC7211BI Units Typ (1) Limit(2) Limit(2)
VOS Input Offset Voltage 3 5 15 mV
8 18
max TCVOS Input Offset Voltage 1.0 μV/°C Temperature Drift Input Offset Voltage Average See (3) 3.3 μV/Month Drift IB Input Current 0.04 pA IOS Input Offset Current 0.02 pA CMRR Common Mode Rejection 0V ≤ VCM ≤ 2.7V 75 dB Ratio PSRR Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 15V 80 dB AV Voltage Gain 100 dB (1) Typical values represent the most likely parametric norm. (2) All limits are guaranteed by testing or statistical analysis. (3) Input offset voltage average drift is calculated by dividing the accelerated operating life VOS drift by the equivalent operational time. This represents worst case input conditions and includes the first 30 days of drift. 2 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LMC7211-N Document Outline FEATURES Applications DESCRIPTION Connection Diagram Absolute Maximum Ratings Operating Ratings 2.7V Electrical Characteristics 5.0V and 15.0V Electrical Characteristics AC Electrical Characteristics Typical Performance Characteristics Application Information Benefits of the LMC7211 Tiny Comparator Low Voltage Operation Shoot-Through Current Output Short Circuit Current Hysteresis Input Protection Layout Considerations Open Drain Output, Dual Versions Additional SOT23-5 Tiny Devices Spice Macromodel