Datasheet LT1961 (Linear Technology) - 9
| Hersteller | Linear Technology |
| Beschreibung | 1.5A, 1.25MHz Step-Up Switching Regulator |
| Seiten / Seite | 16 / 9 — APPLICATIONS INFORMATION. CATCH DIODE. SHUTDOWN AND UNDERVOLTAGE LOCKOUT. … |
| Revision | A |
| Dateiformat / Größe | PDF / 163 Kb |
| Dokumentensprache | Englisch |
APPLICATIONS INFORMATION. CATCH DIODE. SHUTDOWN AND UNDERVOLTAGE LOCKOUT. Figure 4. Undervoltage Lockout
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LT1961
U U W U APPLICATIONS INFORMATION CATCH DIODE
shutdown pin can be used. The threshold voltage of the shutdown pin comparator is 1.35V. A 3μA internal current The suggested catch diode (D1) is a UPS120 or 1N5818 source defaults the open pin condition to be operating (see Schottky. It is rated at 1A average forward current and Typical Performance Graphs). Current hysteresis is added 20V/30V reverse voltage. Typical forward voltage is 0.5V above the SHDN threshold. This can be used to set voltage at 1A. The diode conducts current only during switch off hysteresis of the UVLO using the following: time. Peak reverse voltage is equal to regulator output voltage. Average forward current in normal operation is equal to output current. V V R H L 1= − 7 A μ
SHUTDOWN AND UNDERVOLTAGE LOCKOUT
1 3 . V 5 R2 = Figure 4 shows how to add undervoltage lockout (UVLO) V ( −1 3. V) H 5 to the LT1961. Typically, UVLO is used in situations where + 3 A μ R1 the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant VH – Turn-on threshold power from the source, so source current increases as source voltage drops. This looks like a negative resistance VL – Turn-off threshold load to the source and can cause the source to current limit Example: switching should not start until the input is or latch low under low source voltage conditions. UVLO above 4.75V and is to stop if the input falls below 3.75V. prevents the regulator from operating at source voltages where these problems might occur. VH = 4.75V VL = 3.75V LT1961 7μA 4 7 . V 5 3 7 . V 5 INPUT IN R1= − = k 143 1.35V 7 A μ R1 3μA VCC SHDN 1 3 . V 5 R2 = = 50. k 4 4 7 . V 5 C1 R2 ( −1 3. V5) GND + 3 A μ 1961 F04 k 143 Keep the connections from the resistors to the SHDN pin
Figure 4. Undervoltage Lockout
short and make sure that the interplane or surface capaci- tance to the switching nodes are minimized. If high resis- An internal comparator will force the part into shutdown tor values are used, the SHDN pin should be bypassed with below the minimum VIN of 2.6V. This feature can be used a 1nF capacitor to prevent coupling problems from the to prevent excessive discharge of battery-operated sys- tems. If an adjustable UVLO threshold is required, the switch node. 1961fa 9
U U W U APPLICATIONS INFORMATION CATCH DIODE
shutdown pin can be used. The threshold voltage of the shutdown pin comparator is 1.35V. A 3μA internal current The suggested catch diode (D1) is a UPS120 or 1N5818 source defaults the open pin condition to be operating (see Schottky. It is rated at 1A average forward current and Typical Performance Graphs). Current hysteresis is added 20V/30V reverse voltage. Typical forward voltage is 0.5V above the SHDN threshold. This can be used to set voltage at 1A. The diode conducts current only during switch off hysteresis of the UVLO using the following: time. Peak reverse voltage is equal to regulator output voltage. Average forward current in normal operation is equal to output current. V V R H L 1= − 7 A μ
SHUTDOWN AND UNDERVOLTAGE LOCKOUT
1 3 . V 5 R2 = Figure 4 shows how to add undervoltage lockout (UVLO) V ( −1 3. V) H 5 to the LT1961. Typically, UVLO is used in situations where + 3 A μ R1 the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant VH – Turn-on threshold power from the source, so source current increases as source voltage drops. This looks like a negative resistance VL – Turn-off threshold load to the source and can cause the source to current limit Example: switching should not start until the input is or latch low under low source voltage conditions. UVLO above 4.75V and is to stop if the input falls below 3.75V. prevents the regulator from operating at source voltages where these problems might occur. VH = 4.75V VL = 3.75V LT1961 7μA 4 7 . V 5 3 7 . V 5 INPUT IN R1= − = k 143 1.35V 7 A μ R1 3μA VCC SHDN 1 3 . V 5 R2 = = 50. k 4 4 7 . V 5 C1 R2 ( −1 3. V5) GND + 3 A μ 1961 F04 k 143 Keep the connections from the resistors to the SHDN pin
Figure 4. Undervoltage Lockout
short and make sure that the interplane or surface capaci- tance to the switching nodes are minimized. If high resis- An internal comparator will force the part into shutdown tor values are used, the SHDN pin should be bypassed with below the minimum VIN of 2.6V. This feature can be used a 1nF capacitor to prevent coupling problems from the to prevent excessive discharge of battery-operated sys- tems. If an adjustable UVLO threshold is required, the switch node. 1961fa 9