Datasheet AD8061, AD8062, AD8063 (Analog Devices) - 8

HerstellerAnalog Devices
BeschreibungLow Cost, 300 MHz Rail-to-Rail Amplifier (Single with Disable)
Seiten / Seite20 / 8 — AD8061/AD8062/AD8063. Data Sheet. VS = 5V. VO = 1V p-p. –10. RL = 1kΩ. G …
RevisionJ
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DokumentenspracheEnglisch

AD8061/AD8062/AD8063. Data Sheet. VS = 5V. VO = 1V p-p. –10. RL = 1kΩ. G = +1. –20. BIAS = 1V. Bc). –30. G = –1. N (. 2ND @ 1MHz. TION. –40. D G

AD8061/AD8062/AD8063 Data Sheet VS = 5V VO = 1V p-p –10 RL = 1kΩ G = +1 –20 BIAS = 1V Bc) –30 G = –1 N ( 2ND @ 1MHz TION –40 D G

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AD8061/AD8062/AD8063 Data Sheet 3 0 VS = 5V VS = 5V VO = 1V p-p –10 RL = 1kΩ RL = 1kΩ G = +1 0 V –20 BIAS = 1V Bc) B) (d d –30 G = –1 N ( 2ND @ 1MHz AI –3 TION –40 OR D G T 3RD @ 10MHz E G = –2 –50 S IZ AL –6 C DI –60 NI RM G = –5 O –70 NO –9 HARM –80
013
–90
016
2ND @ 10MHz 3RD @ 1MHz –12
01065-
–100
01065-
1 10 100 1k 0.5 1.0 1.5 2.0 2.5 3.0 3.5 FREQUENCY (MHz) INPUT SIGNAL DC BIAS (V)
Figure 13. Large Signal Frequency Response Figure 16. Harmonic Distortion for a 1 V p-p Signal vs. Input Signal DC Bias
0.1 –40 V 604Ω S = 2.7V VO = 0.2V p-p RL = 1kΩ 10µF 5V + 0 VBIAS = 1V –50 0.1µF G = +1 1kΩ 50Ω B) –60 1MΩ INPUT d 52.3Ω –0.1 N ( B) 0.1µF V + 1kΩ AI S = 5V (d 1.25V –70 dc (RLOAD) D G E –0.2 V TION S = 3V IZ OR –80 AL T 2ND H S RM –0.3 DI –90 NO –0.4 –100
014 017
3RD H –0.5
01065-
–110
01065-
1 10 100 1k 0.01 0.1 1 10 50 FREQUENCY (MHz) FREQUENCY (MHz, START = 10kHz, STOP = 30MHz)
Figure 14. 0.1 dB Flatness Figure 17. Harmonic Distortion for a 1 V p-p Output Signal vs. Input Signal DC Bias
80 200 –30 VS = 5V R 150 –40 L = 1kΩ G = +5 60 100 V PHASE –50 O = 1V p-p 2ND 3RD 10MHz B) 50 40 –60 (d B) GAIN IN 0 (d rees) –70 GA P 20 –50 Deg TION O ( O E OR –80 T -L –100 S HAS 0 P DI –90 2ND PEN –150 3RD 5MHz O –100 –200 1MHz – 20 –250 –110
018 015
2ND 3RD
01065-
– 40 –300
01065-
–120 0.01 0.1 1 10 100 1k 0 1 2 3 4 5 FREQUENCY (MHz) OUTPUT SIGNAL DC BIAS (V)
Figure 15. AD8062 Open-Loop Gain and Phase vs. Frequency, Figure 18. Harmonic Distortion vs. Output Signal DC Bias VS = 5 V, RL = 1 kΩ Rev. J | Page 8 of 20 Document Outline Features Applications Connection Diagrams General Description Revision History Specifications Absolute Maximum Ratings Maximum Power Dissipation ESD Caution Typical Performance Characteristics Circuit Description Headroom Considerations Overload Behavior and Recovery Input Output Capacitive Load Drive Disable Operation Board Layout Considerations Applications Information Single-Supply Sync Stripper RGB Amplifier Multiplexer Outline Dimensions Ordering Guide