Datasheet LT5400 (Analog Devices) - 4

LT5400
e lecTrical characTerisTics The
l
denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
∆R/R Resistor Matching Ratio (Any Resistor to Any Other A-Grade ±0.010 % Resistor) TA = 0°C to 70°C l ±0.010 % TA = –40°C to 85°C l ±0.0125 % TA = –40°C to 125°C l ±0.0125 % B-Grade l ±0.025 % (∆R/R)CMRR Matching for CMRR A-Grade (Note 6) l ±0.005 % B-Grade (Note 6) l ±0.015 % (∆R/R)/∆T Resistor Matching Ratio Temperature Drift (Note 5) l ±0.2 ±1 ppm/°C Resistor Voltage Coefficient l <0.1 ppm/V Excess Current Noise Mil-Std-202 Method 308 <–55 dB ∆R Absolute Resistor Tolerance A-Grade l ±7.5 % B-Grade l ±15 % Distributed Capacitance Resistor to Exposed Pad 5.5 pF Resistor to Resistor 1.4 pF ∆R/∆T Absolute Resistor Value Temperature Drift (Note 5) l –10 8 25 ppm/°C Resistor Matching Ratio Long-Term Drift 35°C 2000Hours, 10mW <2 ppm 70°C 2000Hours, 10mW <4 ppm Resistor Matching Ratio Moisture Resistance 85°C 85%R.H. 168Hours <2 ppm Resistor Matching Ratio Thermal Shock/Hysteresis –50°C to 150°C, 5 Cycles <3 ppm Resistor Matching Ratio IR Reflow 25°C to 260°C, 3 Cycles <3 ppm Resistor Matching Ratio Accelerated Shelf Life 150°C, 1000Hours 10 ppm Harmonic Distortion 20VP-P, 1kHz, Difference Amplifier –120 dBc Shelf Life 25°C, Unbiased, 1 Year ±5 ppm
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
This parameter is not 100% tested. may cause permanent damage to the device. Exposure to any Absolute
Note 6:
(∆R/R)CMRR (Matching for CMRR) is a metric for the contribution Maximum Rating condition for extended periods may affect device of error from the LT5400 when used in a difference configuration using reliability and lifetime. the specific resistor pairs of R1/R2 and R4/R3. See Difference Amplifier,
Note 2:
The instantaneous difference between the highest voltage applied Instrumentation Amplifier, and Differential Amplifier circuits in the Typical to any pin and the lowest voltage applied to any other pin should not Applications section for examples. exceed the Absolute Maximum Rating. This includes the voltage across any resistor, the voltage across any pin with respect to the exposed pad of ( 1 ⎛ R2 R3 ⎛ R1 ΔR/R) • – ⎞ ⎞ the package, and the voltage across any two unrelated pins. CMRR = 2 ⎝⎜ R1 R4⎠⎟ •⎝⎜ R2⎠⎟
Note 3:
In order to keep the junction temperature within the Absolute Maximum Rating, maximum power dissipation should be derated at The resistor contribution to CMRR can then be calculated in the following elevated ambient temperatures. way:
Note 4:
The LT5400C is guaranteed functional over the operating ⎛ R2 4• ⎞ temperature range of –40°C to 85°C. The LT5400C is designed, CMRR = (ΔR/R) ⎜ R1 ⎟ ⎜ ⎟ characterized and expected to meet specified performance from –40°C to CMRR • ⎜ 2+R2+R3⎟ 85°C but is not tested or QA sampled at these temperatures. The LT5400I ⎝ R1 R4 ⎠ is guaranteed to meet specified performance from –40°C to 85°C. The For LT5400 options with resistor ratio 1:1, the resistor contribution to LT5400H is guaranteed to meet specified performance from –40°C to CMRR can be simplified: 125°C and is 100% tested at these temperature extremes. The LT5400MP is guaranteed to meet specified performance from –55°C to 150°C and is CMRR ≈ (∆R/R)CMRR 100% tested at these temperature extremes. 5400fc 4 For more information www.linear.com/LT5400 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Available Options Order Information Electrical Characteristics Typical Performance Characteristics Applications Information Typical Applications Package Description Revision History Typical Application Related Parts