Datasheet MCP6561, MCP6561R, MCP6561U, MCP6562, MCP6564 (Microchip) - 9

MCP6561/1R/1U/2/4 Note:
Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND, RL = 10 k to VDD/2, and CL = 25 pF.
50% 80 100 mV Over-Drive 100 mV Over-Drive VCM = VDD/2 70 VCM = VDD/2 ) 40% tPLH , VDD = 1.8V V ) tPHL % DD= 1.8V s tPHL , VDD = 1.8V Avg. = -7.3 ns V n DD= 5.5V 60 ( 30% StDev= 0.8 ns Avg. = 11.6 ns y ces ( 198 units la n StDev= 2 ns e 50 198 units rre D 20% 40 ccu rop. O P 10% 30 tPLH , VDD = 5.5V tPHL , VDD = 5.5V 0% 20 -20 -15 -10 -5 0 5 10 15 20 -50 -25 0 25 50 75 100 125 Prop. Delay Skew (ns) Temperature (°C) FIGURE 2-25:
Propagation Delay Skew.
FIGURE 2-28:
Propagation Delay vs. Temperature.
260 140 V VCM = VDD/2 CM = VDD/2 120 t 210 ) PHL , 10 mV Over-Drive ) s t s n PLH , 10 mV Over-Drive n ( 100 ( y y 160 tPLH , VDD = 1.8V la la t e 80 e PHL , VDD = 1.8V D . D t t PHL , 100 mV Over-Drive 110 PLH , VDD = 5.5V 60 t t PLH , 100 mV Over-Drive rop. PHL , VDD = 5.5V Prop P 60 40 20 10 1.5 2.5 3.5 4.5 5.5 1 10 100 1000 VDD (V) Over-Drive (mV) FIGURE 2-26:
Propagation Delay vs.
FIGURE 2-29:
Propagation Delay vs. Input Supply Voltage. Over-Drive.
80 80 VDD= 1.8V VDD= 5.5V 70 100 mV Over-Drive 70 100 mV Over-Drive ) t s PHL t ) PLH s n 60 ( n 60 y ( y tPHL tPLH la e 50 la e 50 . D D 40 40 rop. Prop P 30 30 20 20 0.00 0.50 1.00 1.50 2.00 0.0 1.0 2.0 3.0 4.0 5.0 6.0 VCM (V) VCM (V) FIGURE 2-27:
Propagation Delay vs.
FIGURE 2-30:
Propagation Delay vs. Common-mode Input Voltage. Common-mode Input Voltage.  2009-2013 Microchip Technology Inc. DS22139C-page 9 Document Outline MCP6561/1R/1U/2/4 1.0 Electrical Characteristics 1.1 Maximum Ratings 1.2 Test Circuit Configuration FIGURE 1-1: AC and DC Test Circuit for the Push-Pull Output Comparators. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input vs. Output Signal, No Phase Reversal. FIGURE 2-4: Input Hysteresis Voltage. FIGURE 2-5: Input Hysteresis Voltage Drift - Linear Temp. Co. (TC1). FIGURE 2-6: Input Hysteresis Voltage Drift - Quadratic Temp. Co. (TC2). FIGURE 2-7: Input Offset Voltage vs. Temperature. FIGURE 2-8: Input Offset Voltage vs. Common-mode Input Voltage. FIGURE 2-9: Input Offset Voltage vs. Common-mode Input Voltage. FIGURE 2-10: Input Hysteresis Voltage vs. Temperature. FIGURE 2-11: Input Hysteresis Voltage vs. Common-mode Input Voltage. FIGURE 2-12: Input Hysteresis Voltage vs. Common-mode Input Voltage. FIGURE 2-13: Input Offset Voltage vs. Supply Voltage vs. Temperature. FIGURE 2-14: Quiescent Current. FIGURE 2-15: Quiescent Current vs. Common-mode Input Voltage. FIGURE 2-16: Input Hysteresis Voltage vs. Supply Voltage vs. Temperature. FIGURE 2-17: Quiescent Current vs. Supply Voltage vs Temperature. FIGURE 2-18: Quiescent Current vs. Common-mode Input Voltage. FIGURE 2-19: Quiescent Current vs. Toggle Frequency. FIGURE 2-20: Output Headroom vs. Output Current. FIGURE 2-21: Low-to-High and High-to- Low Propagation Delays. FIGURE 2-22: Short Circuit Current vs. Supply Voltage vs. Temperature. FIGURE 2-23: Output Headroom vs.Output Current. FIGURE 2-24: Low-to-High and High-to- Low Propagation Delays . FIGURE 2-25: Propagation Delay Skew. FIGURE 2-26: Propagation Delay vs. Supply Voltage. FIGURE 2-27: Propagation Delay vs. Common-mode Input Voltage. FIGURE 2-28: Propagation Delay vs. Temperature. FIGURE 2-29: Propagation Delay vs. Input Over-Drive. FIGURE 2-30: Propagation Delay vs. Common-mode Input Voltage. FIGURE 2-31: Propagation Delay vs. Capacitive Load. FIGURE 2-32: Input Bias Current vs. Input Voltage vs Temperature. FIGURE 2-33: Common-mode Rejection Ratio and Power Supply Rejection Ratio vs. Temperature. FIGURE 2-34: Power Supply Rejection Ratio (PSRR). FIGURE 2-35: Common-mode Rejection Ratio (CMRR). FIGURE 2-36: Common-mode Rejection Ratio (CMRR). FIGURE 2-37: Output Jitter vs. Input Frequency. FIGURE 2-38: Input Offset Current and Input Bias Current vs. Temperature. FIGURE 2-39: Input Offset Current and Input Bias Current vs. Common-mode Input Voltage vs. Temperature. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Inputs 3.2 Digital Outputs 3.3 Power Supply (VSS and VDD) 4.0 Applications Information 4.1 Comparator Inputs 4.1.1 Normal Operation FIGURE 4-1: The MCP6561/1R/1U/2/4 Comparators’ Internal Hysteresis Eliminates Output Chatter Caused by Input Noise Voltage. 4.1.2 Input Voltage and Current Limits FIGURE 4-2: Simplified Analog Input ESD Structures. FIGURE 4-3: Protecting the Analog Inputs. 4.1.3 Phase Reversal 4.2 Push-Pull Output 4.3 Externally Set Hysteresis 4.3.1 Non-Inverting Circuit FIGURE 4-4: Non-inverting Circuit with Hysteresis for Single-Supply. FIGURE 4-5: Hysteresis Diagram for the Non-inverting Circuit. 4.3.2 Inverting Circuit FIGURE 4-6: Inverting Circuit With Hysteresis. FIGURE 4-7: Hysteresis Diagram for the Inverting Circuit. FIGURE 4-8: Thevenin Equivalent Circuit. 4.4 Bypass Capacitors 4.5 Capacitive Loads 4.6 PCB Surface Leakage FIGURE 4-9: Example Guard Ring Layout for Inverting Circuit. 4.7 PCB Layout Technique FIGURE 4-10: Recommended Layout. 4.8 Unused Comparators FIGURE 4-11: Unused Comparators. 4.9 Typical Applications 4.9.1 Precise Comparator FIGURE 4-12: Precise Inverting Comparator. 4.9.2 Windowed Comparator FIGURE 4-13: Windowed Comparator. 4.9.3 Bistable Multivibrator FIGURE 4-14: Bistable Multivibrator. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration and Evaluation Boards 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service