Datasheet MAX5436, MAX5437, MAX5438, MAX5439 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | ±15V, 128-Tap, Low-Drift Digital Potentiometers |
| Seiten / Seite | 11 / 7 — ±15V, 128-Tap, Low-Drift Digital Potentiometers. MAX5436–MAX5439. Pin … |
| Dateiformat / Größe | PDF / 248 Kb |
| Dokumentensprache | Englisch |
±15V, 128-Tap, Low-Drift Digital Potentiometers. MAX5436–MAX5439. Pin Description. PIN. MAX5436/. MAX5437/. NAME. DESCRIPTION. MAX5438
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±15V, 128-Tap, Low-Drift Digital Potentiometers MAX5436–MAX5439 Pin Description PIN MAX5436/ MAX5437/ NAME DESCRIPTION MAX5438 MAX5439
1 1 SCLK Serial Clock Input 2 2 DIN Serial Data Input 3 3 CS Chip Select — 4 SHDN Amplifier Shutdown 4 5 GND Analog and Digital Ground 5 6 VSS Negative Analog Supply. Bypass with a 0.1µF capacitor to GND. — 7 OUT Amplifier Output — 8 IN- Amplifier Negative Input — 9 IN+ Amplifier Positive Input 6 10 VDD Positive Analog Supply. Bypass with a 0.1µF capacitor to GND. 7 11 H High Terminal of Resistor 8 12 W Wiper Terminal of Resistor 9 13 L Low Terminal of Resistor 10 14 VCC Digital Supply. Bypass with a 0.1µF capacitor to GND.
Detailed Description Adjustable Gain Amplifier
The MAX5436/MAX5438 are used with the MAX427 to
Digital Interface Operation
make a digitally adjustable gain circuit as shown in The MAX5436–MAX5439 use a 3-wire SPI/QSPI/ Figure 4. The normal feedback resistor is replaced with MICROWIRE-compatible serial data interface to control the MAX5436/MAX5438 in a variable-resistor configura- the wiper position. This write-only interface contains tion so that the gain of the circuit can be digitally con- three inputs: chip select (CS), data in (DIN), and serial trolled. The MAX5437/MAX5439 can use the internal clock (SCLK). When CS is taken low, data from DIN is high-voltage amplifier to make this digitally adjustable synchronously loaded into the serial shift register on the gain circuit. rising edge of each SCLK pulse (Figure 2). The 8-bit
LCD Biasing Control Applications
data word requires 8 clock pulses to input the serial The MAX5436–MAX5439 are ideal for LCDs that require data. Note that the first bit of the data word, D7, is separate voltage for contrast control in addition to the unused and should be ignored. Therefore, the second main supply voltage. Figure 5a shows the MAX5436– rising edge of SCLK loads the MSB. After all the data MAX5439 being used for LCD contrast control along with bits have been shifted in, they are latched into the the MAX629, which provides the LCD supply voltage. A potentiometer control register when CS transitions from similar circuit with an additional buffer circuit is shown in low to high, the wiper position is then updated. Note Figure 5b. that if CS is not kept low during the entire data stream, the data will be corrupted and the device will need to be reloaded.
Applications Information Power-Up Sequencing
The MAX5436–MAX5439 have been designed so that any of the supplies can turn on first without causing any unwanted crowbar currents to flow. Note that both digital and analog supplies are required to power up the wiper and uncommitted amplifier (MAX5437/MAX5439 only).
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1 1 SCLK Serial Clock Input 2 2 DIN Serial Data Input 3 3 CS Chip Select — 4 SHDN Amplifier Shutdown 4 5 GND Analog and Digital Ground 5 6 VSS Negative Analog Supply. Bypass with a 0.1µF capacitor to GND. — 7 OUT Amplifier Output — 8 IN- Amplifier Negative Input — 9 IN+ Amplifier Positive Input 6 10 VDD Positive Analog Supply. Bypass with a 0.1µF capacitor to GND. 7 11 H High Terminal of Resistor 8 12 W Wiper Terminal of Resistor 9 13 L Low Terminal of Resistor 10 14 VCC Digital Supply. Bypass with a 0.1µF capacitor to GND.
Detailed Description Adjustable Gain Amplifier
The MAX5436/MAX5438 are used with the MAX427 to
Digital Interface Operation
make a digitally adjustable gain circuit as shown in The MAX5436–MAX5439 use a 3-wire SPI/QSPI/ Figure 4. The normal feedback resistor is replaced with MICROWIRE-compatible serial data interface to control the MAX5436/MAX5438 in a variable-resistor configura- the wiper position. This write-only interface contains tion so that the gain of the circuit can be digitally con- three inputs: chip select (CS), data in (DIN), and serial trolled. The MAX5437/MAX5439 can use the internal clock (SCLK). When CS is taken low, data from DIN is high-voltage amplifier to make this digitally adjustable synchronously loaded into the serial shift register on the gain circuit. rising edge of each SCLK pulse (Figure 2). The 8-bit
LCD Biasing Control Applications
data word requires 8 clock pulses to input the serial The MAX5436–MAX5439 are ideal for LCDs that require data. Note that the first bit of the data word, D7, is separate voltage for contrast control in addition to the unused and should be ignored. Therefore, the second main supply voltage. Figure 5a shows the MAX5436– rising edge of SCLK loads the MSB. After all the data MAX5439 being used for LCD contrast control along with bits have been shifted in, they are latched into the the MAX629, which provides the LCD supply voltage. A potentiometer control register when CS transitions from similar circuit with an additional buffer circuit is shown in low to high, the wiper position is then updated. Note Figure 5b. that if CS is not kept low during the entire data stream, the data will be corrupted and the device will need to be reloaded.
Applications Information Power-Up Sequencing
The MAX5436–MAX5439 have been designed so that any of the supplies can turn on first without causing any unwanted crowbar currents to flow. Note that both digital and analog supplies are required to power up the wiper and uncommitted amplifier (MAX5437/MAX5439 only).
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