Datasheet MSPM0C110, MSPS003 (Texas Instruments) - 8

link to page 9
MSPM0C1104 , MSPM0C1103
SLASF90C – OCTOBER 2023 – REVISED FEBRUARY 2025
www.ti.com 6.2 Pin Attributes
The following table describes the functions available on every pin for each device package.
Note
Each digital I/O on a device is mapped to a specific Pin Control Management Register (PINCMx) that lets users configure the desired Pin Function using the PINCM.PF control bits.
Table 6-1. Pin Attributes PIN FUNCTION PIN NUMBER PINCM I/O x PIN Structure ANALOG DIGITAL
(1)
NAME 20 VSSOP 20 TSSOP 20 WQFN 16 SOT 8 SOT 8 WSON 8 DSBGA
N/A VDD 6 9 4 5 4 4 C2 Power N/A VSS 7 7 5 6 3 3 D2 Power 5V Tolerant BEEP [2] / I2C0_SDA [3] / TIMG8_C0 [4] / SPI0_CS1 1 PA0 4 11 2 3 5 5 A2 Open- [5]/ FCC_IN [6]/ TIMA_FAL1 [7] Drain 5V Tolerant I2C0_SCL [2] / TIM8_C0 [3] / HFCLK_IN [4]/ 2 PA1 12 Open- TIMA0_C1 [5] 5 3 4 2 2 B2 Drain N/A NRST 4 Reset TIMG8_C1[2] / SPI0_CS0[3] / TIMA0_C0[4] / 3 PA2 8 8 6 7 - - - Standard TIMG8_IDX[5] TIMA0_C0N[2] / SPI0_POCI[3]/ LFCLK_IN[4]/ 5 PA4 9 5 7 - - - - Standard HFCLK_IN[5] / TIMA0_C1N[6] TIMG14__C1[2] / SPI0_SCK[3] / TIMA0_C1[4] / 7 PA6 10 10 8 8 - - - Standard TIMG14_C2[5] / SPI0_CS0[6] / TIMA_FAL0[7] 12 PA11 SPI0_SCK[2] / I2C0_SCL[3] / TIMA_FAL0[4] 11 6 9 - - - - Standard TIMA0_C1N[2] / SPI0_POCI[3] / TIMG14_C0[4] / 17 PA16 A8 12 - 10 - - - - Standard FCC_IN[5] UART0_TX[2] / TIMA0_C0N[3] / SPI0_SCK[4] / 18 PA17 A9 13 13 11 9 - - - Standard TIMA0_C2[5] / SPI0_CS1[6] / TIMA0_C3[7] UART0_RX[2] / SPI0_PICO[3] / TIMA0_C1N[4] / 19 PA18 A7 14 14 12 10 - - - Standard CLK_OUT[5] / TIMA0_C3[6] / TIMA0_C3N[7] SWDIO[2] / SPI0_SCK[3] / SPI0_POCI[4] / 20 PA19 15 15 13 11 6 6 D1 Standard TIMA0_C2[5] / TIMG14_C0[6] / UART0_CTS[7] SWCLK[2] / TIMA_FAL1[3] / SPI0_PICO[4] / 21 PA20 A6 16 16 14 12 7 7 C1 Standard TIMA0_C2N[5] / TIMA0_C0[6] / UART0_RTS[7] UART0_RX[2] / SPI0_POCI[3] / UART0_RTS[4] / 23 PA22 A4 17 17 15 13 - - - Standard CLK_OUT[5] / TIMA0_C1[6] UART0_TX[2] / SPI0_CS3[3] / TIMG14_C0[4] / 24 PA23 18 18 16 14 - - - Standard UART0_CTS[5] / TIMA0_C3[6] / TIMG14_C1[7] SPI0_CS2[2] / TIMG14_C1[3] / UART0_RTS[4] / 25 PA24 A3 19 19 17 15 8 8 A1 Standard TIMG14_C2[5] / TIMA0_C3N[6] / UART0_RX[7] TIMG14_C3[2] / UART0_TX[3] / SPI0_PICO[4] / 26 PA25 A2 20 20 18 16 - - - Standard TIMG14_C1[5] / TIMA_FAL2[6] TIMG8_C0[2] / UART0_RX[3] / SPI0_POCI[4] / 27 PA26 A1 1 1 19 1 - - - Standard BEEP[5] / TIMG14_C0[6] / TIMA_FAL0[7] TIMG8_C1[2] / SPI0_CS3[3] / TIMA0_C0N[4] / 28 PA27 A0 2 2 20 - 1 1 B1 Standard UART0_TX[5] / SPI0_POCI[6] / TIMA_FAL2[7] 8 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: MSPM0C1104 MSPM0C1103 Document Outline 1 Features 2 Applications 3 Description 4 Functional Block Diagram Table of Contents 5 Device Comparison 6 Pin Configuration and Functions 6.1 Pin Diagrams 6.2 Pin Attributes 6.3 Signal Descriptions 6.4 Connections for Unused Pins 7 Specifications 7.1 Absolute Maximum Ratings 7.2 ESD Ratings 7.3 Recommended Operating Conditions 7.4 Thermal Information 7.5 Supply Current Characteristics 7.5.1 RUN/SLEEP Modes 7.5.2 STOP/STANDBY Modes 7.5.3 SHUTDOWN Mode 7.6 Power Supply Sequencing 7.6.1 POR and BOR 7.6.2 Power Supply Ramp 7.7 Flash Memory Characteristics 7.8 Timing Characteristics 7.9 Clock Specifications 7.9.1 System Oscillator (SYSOSC) 7.9.2 Low Frequency Oscillator (LFOSC) 7.10 Digital IO 7.10.1  Electrical Characteristics 7.10.2 Switching Characteristics 7.11 ADC 7.11.1 Electrical Characteristics 7.11.2 Switching Characteristics 7.11.3 Linearity Parameters 7.11.4 Typical Connection Diagram 7.12 Temperature Sensor 7.13 VREF 7.13.1 Voltage Characteristics 7.13.2 Electrical Characteristics 7.14 I2C 7.14.1 I2C Characteristics 7.14.2 I2C Filter 7.14.3 I2C Timing Diagram 7.15 SPI 7.15.1 SPI 7.15.2 SPI Timing Diagrams 7.16 UART 7.17 TIMx 7.18 Windowed Watchdog Characteristics 7.19 Emulation and Debug 7.19.1 SWD Timing 8 Detailed Description 8.1 CPU 8.2 Operating Modes 8.2.1 Functionality by Operating Mode (MSPM0C110x) 8.3 Power Management Unit (PMU) 8.4 Clock Module (CKM) 8.5 DMA 8.6 Events 8.7 Memory 8.7.1 Memory Organization 8.7.2 Peripheral File Map 8.7.3 Peripheral Interrupt Vector 8.8 Flash Memory 8.9 SRAM 8.10 GPIO 8.11 IOMUX 8.12 ADC 8.13 Temperature Sensor 8.14 VREF 8.15 CRC 8.16 UART 8.17 SPI 8.18 I2C 8.19 WWDT 8.20 Timers (TIMx) 8.21 Device Analog Connections 8.22 Input/Output Diagrams 8.23 Serial Wire Debug Interface 8.24 Device Factory Constants 8.25 Identification 9 Applications, Implementation, and Layout 9.1 Typical Application 9.1.1 Schematic 10 Device and Documentation Support 10.1 Device Nomenclature 10.2 Tools and Software 10.3 Support Resources 10.4 Trademarks 10.5 Electrostatic Discharge Caution 10.6 Glossary 11 Revision History 12 Mechanical, Packaging, and Orderable Information