Datasheet IRFP22N60K (Vishay) - 5
| Hersteller | Vishay |
| Beschreibung | Power MOSFET in TO-247AC package |
| Seiten / Seite | 10 / 5 — IRFP22N60K. Fig. 11 - Maximum Effective Transient Thermal Impedance, … |
| Dateiformat / Größe | PDF / 504 Kb |
| Dokumentensprache | Englisch |
IRFP22N60K. Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Modelllinie für dieses Datenblatt
Textversion des Dokuments
IRFP22N60K
www.vishay.com Vishay Siliconix
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS 15 V tp L Driver VDS R G D.U.T + V - DD I I AS A AS 20 V t 0.01 p Ω
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
800 I D ) TOP 9.8A J m 14A ( BOTTOM 22A gy 600 ner he E anc al v 400 e A ls u e P ingl 200 , S ASE 0 25 50 75 100 125 150 Starting TJ, Junction Temperature
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T. Q 50 kΩ G 10 V 12 V 0.2 µF 0.3 µF Q Q GS GD + V D.U.T. DS - VG VGS 3 mA Charge I I G D Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
S22-0046, Rev. C, 24-Jan-2021
5
Document Number: 91208 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
www.vishay.com Vishay Siliconix
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS 15 V tp L Driver VDS R G D.U.T + V - DD I I AS A AS 20 V t 0.01 p Ω
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
800 I D ) TOP 9.8A J m 14A ( BOTTOM 22A gy 600 ner he E anc al v 400 e A ls u e P ingl 200 , S ASE 0 25 50 75 100 125 150 Starting TJ, Junction Temperature
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T. Q 50 kΩ G 10 V 12 V 0.2 µF 0.3 µF Q Q GS GD + V D.U.T. DS - VG VGS 3 mA Charge I I G D Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
S22-0046, Rev. C, 24-Jan-2021
5
Document Number: 91208 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000