Datasheet IMX (Power Integrations) - 10

InnoMux2-EP InnoMux2-EP Functional Description
In addition, a shunt regulator clamps the PRIMARY BYPASS pin voltage to V when current is provided to the PRIMARY BYPASS The InnoMux2-EP combines a high-voltage power switch, along with SHUNT pin through an external resistor. This al ows the InnoMux2-EP IC to both primary-side and secondary-side control ers in one device. The be powered external y through a bias winding, decreasing the no-load InnoMux2-EP architecture incorporates a novel inductive coupling consumption and enhancing low-standby-power operation. feedback scheme using the package lead frame and bond wires to provide a safe, reliable, and low-cost means to accurately communi-
Primary Bypass I Programming LIM
cate power requests from the secondary control er to the primary InnoMux2-EP ICs al ow the user to adjust primary current limit (I ) LIM controller. settings through the selection of the PRIMARY BYPASS pin capacitor value. A ceramic capacitor can be used. There are 2 selectable The primary control er on InnoMux2-EP is a quasi-resonant (QR) capacitor sizes − 0.47 μF and 4.7 μF for setting standard and flyback control er to operate in continuous conduction mode (CCM) or increased I settings respectively. LIM discontinous conduction mode (DCM) with Zero voltage switching
Primary Bypass Undervoltage Threshold
(ZVS) using advanced SR FET control. The control er uses a variable current control scheme. The primary consists of a jitter oscillator; a The PRIMARY BYPASS pin undervoltage circuitry disables the power receiver circuit magnetical y coupled to the secondary control er, a switch when the PRIMARY BYPASS pin voltage drops below ~4.5 V current limit control er, 5 V regulator on the PRIMARY BYPASS pin, (= V ‒ V ) in steady-state operation. Once the PRIMARY BPP BPP(H) audible noise reduction engine, bypass overvoltage detection circuit, BYPASS pin voltage fal s below this threshold, it must rise to a lossless input line sensing circuit, current limit selection circuitry, V to re-enable turn-on of the power switch. BPP(SHUNT) overvoltage protection, leading edge blanking, secondary output
Primary Bypass Output Overvoltage Function
diode / SR MOSFET short protection circuit and a 650 V / 725 V / The PRIMARY BYPASS pin has an OV protection feature with either a 750 V and 1700 V power switch. latching or an auto-reset response. A Zener diode in paral el with the resistor in series with the PRIMARY BYPASS pin capacitor is typical y The secondary control er consists of a transmitter circuit that is used to detect an overvoltage on the primary bias winding and magnetical y coupled to the primary receiver, multi-output control er activate the protection mechanism. In the event that the current into for regulating up to three outputs independently, 5 V regulator on the the PRIMARY BYPASS pin exceeds I , the device will latch-off or SECONDARY BYPASS pin, synchronous rectifier (SR) MOSFET driver, SD disable the power switch for a time t , after which time the high-side MOSFET drivers, shunts to prevent individual outputs from AR(OFF) control er will restart and attempt to return to regulation. rising in abnormal loading conditions, single string LED driver, timing functions and a host of integrated protection features. Output OV protection is also included as an integrated feature on the secondary controller. Figures 4, 5 and 6 show the functional block diagrams of the primary and secondary control ers with the most important features.
Over-Temperature Protection
The thermal shutdown circuitry senses the primary switch die
Primary Controller
temperature. The threshold is set to T with either a hysteretic or SD latch-off response. The InnoMux2-EP IC has variable frequency CCM / CrM / DCM control er plus ZVS operation in DCM for enhanced efficiency and Hysteretic response: If the die temperature rises above the threshold, extended output power capability. the power switch is disabled and remains disabled until the die temperature fal s by T at which point switching is re-enabled. A For high-voltage input, the 1700 V InnoMUX2-EP (IMX2353F) has a SD(H) large amount of hysteresis is provided to prevent over-heating of the variable frequency DCM only control er plus SR ZVS operation. This PCB due to a continuous fault condition. DCM ZVS operation achieves zero voltage switching on the primary switch using SR MOSFET. This reduces the capacitive turn on loss Latch-off response: If the die temperature rises above the threshold and improves efficiency. the power switch is disabled. The latching condition is reset by
PRIMARY BYPASS Pin Regulator
bringing the PRIMARY BYPASS pin below V or by going below BPP(RESET) The PRIMARY BYPASS pin has an internal regulator that charges the the UNDER/OVER INPUT VOLTAGE pin UV threshold. (IUV-) PRIMARY BYPASS pin capacitor to V by drawing current from the BPP Over-temperature protection is also included as an integrated feature DRAIN pin whenever the power switch is off. The PRIMARY BYPASS on the secondary control er. pin is the internal supply voltage node. When the power switch is on, the device operates from the energy stored in the PRIMARY BYPASS
Current Limit Operation
pin capacitor. The primary-side control er has a current limit threshold ramp that is inversely proportional to the time from the end of the previous primary switching cycle (i.e. from the time the primary switch turns off at the end of a switching cycle) to the next switching request.
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Rev. C 10/24 www.power.com